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Ankur Bal
Observed name:
Ankur BAL
Institution:
STMicroelectronics (India)
Observed institutions:
STMicroelectronics (India),
STMicroelectronics (France)
ORCID:
0000-0003-1140-0512
Observed ORCID:
0000-0003-1140-0512
OpenAlex ID:
A5054016998
A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio $\Sigma\Delta$ ADC
2016
·
Manuel J. Barragan
, Rshdee Alhakim
, et al.
·
IEEE Transactions on Circuits and Systems I Regular Papers
·
26
Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques
2016
·
Manuel J. Barragan
, Haralampos-G. Stratigopoulos
, et al.
·
IEEE Design and Test
·
22
PDF
Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times
2015
·
Haralampos-G. Stratigopoulos
, Manuel J. Barragan
, et al.
·
IEEE International Test Conference (ITC)
·
9
PDF
A 12b 1.7GS/s two-times interleaved DAC with <-62dBc IM3 across Nyquist using a single 1.2V supply
2013
·
Erik Olieman
, Anne-Johan Annema
, et al.
·
IEEE Asian Solid-State Circuits Conference (A-SSCC)
·
9
A Novel Programmable Delay Line for VLSI Systems
2019
·
Ankur Bal
, Jeet Narayan Tiwari
, et al.
·
IEEE Workshop on Signal and Power Integrity
·
4
A Low-Cost 0.00063-mm2, 0.44-pJ/b, 2-Gb/s All-Digital Fully Synthesizable CDR for Serial Links Using Single-Phase Input Clock
2022
·
Ankur Bal
, Rupesh Singh
, et al.
·
IEEE Transactions on Circuits & Systems II Express Briefs
·
2
A novel on-chip mismatch measurement technique for Nyquist rate ADCs
2018
·
Ankur BAL
, Vikram SINGH
·
IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)
·
1
A 1.16GHz -160.4dBFS/Hz-NSD multi-bit Continuous-Time Delta-Sigma ADC Achieving SNR/SNDR of 86dB/83dB in 17.5MHz-BW without DAC calibration
2026
·
Vaibhav Garg
, Paras Garg
, et al.
·
Custom Integrated Circuits Conference
A Real Time Multi-Bit DAC Mismatch Estimation & Correction Technique For Wideband Continuous Time Sigma Delta Modulators
2022
·
Ankur Bal
, Sharad Gupta
, et al.
·
International Conference on VLSI Design
40nmCMOS 18ビットステレオオーディオの動的テストのための3値テスト刺激に基づく完全デジタルBISTラッパーΣΔ ADC
2016
·
J Barragan Manuel
, Rshdee Alhakim
, et al.
·
IEEE Transactions on Circuits and Systems I Regular Papers
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Works count:
10
Citation count:
73
H-index:
4
I10-index:
2
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