Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Mahoki Onoda
Observed names:
M. Onoda,
M.Onoda,
小野田, 真穂樹
Observed institutions:
Tokyo Institute of Technology,
Takushoku University
OpenAlex ID:
A5056254762
Robust recursive time series modeling based on an AR model excited by a t-distribution process
1998
·
J. Sanubari
, K. Tokuda
, et al.
·
IEEE Transactions on Signal Processing
·
4
Spectral estimation based on AR-model excited by t-distribution process
1992
·
J. Sanubari
, K. Tokuda
, et al.
·
IEEE International Conference on Acoustics Speech and Signal Processing
·
4
Adjoint network approach to sensitivity calculation for switched‐capacitor networks
1982
·
Hiroaki Kunieda
, Mineo Kaneko
, et al.
·
Electronics and Communications in Japan (Part I Communications)
·
4
Speech Analysis Based on AR Model Driven by t-Distribution Process
1992
·
J. Sanubari
, Keiichi Tokuda
, et al.
·
Institutional Repositories DataBase (IRDB)
·
3
Robust two dimensional spectral estimation based on AR model excited by a t-distribution process
2002
·
J. Sanubari
, K. Tokuda
, et al.
·
IEEE International Conference on Acoustics Speech and Signal Processing
·
2
Equivalent representation of multiwire transmission-line transformers and its applications to the design of hybrid networks
1980
·
H. Kunieda
, M. Onoda
·
IEEE Transactions on Circuits and Systems
·
2
Robust recursive spectral estimation based on AR model excited by a t-distribution process
2002
·
J. Sanubari
, K. Tokuda
, et al.
·
IEEE International Conference on Acoustics Speech and Signal Processing
·
1
Topological formulas for switched capacitor networks
1983
·
Mineo Kaneko
, Hiroaki Kunieda
, et al.
·
Electronics and Communications in Japan (Part I Communications)
·
1
Array architecture for solving large-scale linear system of equations by block Gauss-Seidel algorithm and local reordering approach
2003
·
B. Chen
, M. Onoda
·
IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)
A distributed reconfiguration controller for linear array harvest problem: hierarchically quasi-normalized neural approach
2002
·
S. Sutikno
, M. Kaneko
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
Logical function and delay time extraction from MOS circuit data
2002
·
K. Fujiyoshi
, M. Kaneko
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
A study of the number of tracks required for the reconfiguration of mesh‐connected processor‐element networks
1996
·
Mineo Kaneko
, Toshihiko Tsunokawa
, et al.
·
Electronics and Communications in Japan (Part III Fundamental Electronic Science)
Overlapped Partitioning Algorithm for the Solution of LSEs with Fixed Size Processor Array
1993
·
Ben Chen
, M. Onoda
·
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
Time Series Analysis Based on Exponential Model Excited by t-Distribution Process and lts Algorithm
1993
·
J. Sanubari
, Keiichi Tokuda
, et al.
·
Institutional Repositories DataBase (IRDB)
A signal‐flow graph representation for switched‐capacitor networks and its application to SC circuit design
1987
·
Mineo Kaneko
, Mahoki Onoda
·
Electronics and Communications in Japan (Part I Communications)
波形歪の少い遅延回路網の構成に関する研究
1964
·
小野田, 真穂樹
·
Institutional Repositories DataBase (IRDB)
A compact video delay line
1963
·
Mahoki Onoda
·
IEEE Transactions on Broadcast and Television Receivers
Show more works
View as search
Works count:
25
Citation count:
21
H-index:
3
I10-index:
Year
Topic
Type
