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Author

Bayartulga Ishdorj

Observed institution: Incheon National University
ORCID: 0009-0002-4519-4788
Observed ORCID: 0009-0002-4519-4788
OpenAlex ID: A5056300251
Offset-Canceling Current-Latched Sense Amplifier With Slow Rise Time Control and Reference Voltage Biasing Techniques
2023 · Bayartulga Ishdorj, Doyeon Kim, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 13
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Offset-Tolerant Body-Biased Sense Amplifier With Rise-Time Control Technique for SRAM
2025 · Jaehwan Kim, Mingu Han, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 4
Reliability-Enhanced Offset-Canceling Current-Sampling Sense Amplifier for 2T-2MTJ MRAM PUF
2025 · Mingu Han, Jaehwan Kim, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 3
Spin-Transfer-Torque Magnetic-Tunnel-Junction-Based Low-Power Nonvolatile Flip-Flop Designs in the Subthreshold Voltage Region
2023 · Bayartulga Ishdorj, Taehui Na · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 3
Recovery-Signal-Based Low-Cost Quadruple-Node-Upset-Tolerant and Self-Recoverable Latch Design for Aerospace Applications
2026 · Jaeyong Jang, Bayartulga Ishdorj, et al. · IEEE Transactions on Aerospace and Electronic Systems · 1
Double-Node-Upset Fully-Tolerant/Recoverable and Triple-Node-Upset Partially-Tolerant Self-Recoverable Latch Design for Aerospace Applications
2025 · Urmila Saha, Bayartulga Ishdorj, et al. · IEEE Access · 1
A Timing-Based Split-Path Sensing Circuit for STT-MRAM
2022 · Bayartulga Ishdorj, Jeongyeon Kim, et al. · Micromachines · 1
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Design Parameter Optimization of FPGA-based Ring Oscillator TRNG and Its Application to P-bit Inverse Computation System
2026 · Jaeyong Jang, Changhun Ji, et al. · Journal of the Institute of Electronics and Information Engineers
A Low-Power MRAM-Based Nonvolatile Flip-Flop Architecture for Register and System Applications
2026 · Bayartulga Ishdorj, Taehui Na · IEEE Solid-State Circuits Letters
Capacitive Control of High-V BL Offset in Current-Latched Sense Amplifiers
2026 · Changhun Ji, Mingu Han, et al. · IEEE Access
A Practical MRAM Logic-in-Memory Platform With Reference-Bitline Structure
2026 · Seongmin Ahn, Minjun Jang, et al. · IEEE Solid-State Circuits Letters
Spin Current Enhancement Using Double-Ferromagnetic-Layer Structure for Magnetoelectric Spin-Orbit Logic Device
2024 · Bayartulga Ishdorj, Shumaila Sharif, et al. · Electronics
Works count: 12
Citation count: 26
H-index: 3
I10-index: 1
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