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Roland Höller

Observed names: Holler, Roland, Höller, R, R. Holler, R. Höller, Roland Holler
OpenAlex ID: A5059078162
Open-Source RISC-V Processor IP Cores for FPGAs — Overview and Evaluation
2019 · Roland Holler, Dominic Haselberger, et al. · Mediterranean Conference on Embedded Computing (MECO) · 56
Embedded SynUTC and IEEE 1588 clock synchronization for industrial Ethernet
2004 · R. Holler, T. Sauter, et al. · IEEE International Conference on Emerging Technologies and Factory Automation (ETFA) · 39
PSynUTC - Evaluation of a High Precision Time Synchronization Prototype System for Ethernet LANs
2002 · Martin Horauer, K. Schossmaier, et al. · 28
Extending IEEE 1588 to fault tolerant clock synchronization
2005 · G. Gaderer, R. Holler, et al. · IEEE International Workshop on Factory Communication Systems (WFCS) · 22
SynUTC - high precision time synchronization over ethernet networks
2002 · Schmid, U, Schossmaier, K, et al. · CERN Document Server (European Organization for Nuclear Research) · 15
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Accelerating RTL Simulation by Several Orders of Magnitude Using Clock Suppression
2006 · Hannes Muhr, Roland Holler · International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation · 9
A Test Tool for FlexRay-based Embedded Systems
2007 · Martin Horauer, Oliver Praprotnik, et al. · IEEE International Symposium on Industrial Embedded Systems (SIES) · 7
Survey and Comparison of Digital Logic Simulators
2019 · Peter Roessler, Roland Höller, et al. · Austrochip Workshop on Microelectronics (Austrochip) · 6
Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation
2023 · Christian Fibich, Patrick Schmitt, et al. · International Journal of Reconfigurable Computing · 4
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Open-Source Crypto IP Cores for FPGAs – Overview and Evaluation
2019 · M. Billmann, S. Werner, et al. · Austrochip Workshop on Microelectronics (Austrochip) · 4
IEEE 1588 clock synchronization over IEEE 802.3/10 GBit ethernet
2010 · Christof Kutschera, Andreas Groblinger, et al. · IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication · 4
FPGAs for High Accuracy Clock Synchronization over Ethernet Networks
2003 · Roland Höller · Lecture notes in computer science · 4
A novel debug solution for distributed embedded applications and implementation options
2011 · Peter Rossler, Roland Holler · Annual Conference of the IEEE Industrial Electronics Society (IECON) · 3
A Heterogeneous Hardware-Software Co-Simulation Environment Using User Mode Linux and Clock Suppression
2006 · Hannes Muhr, Roland Holler, et al. · IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications · 3
A Model Railway based Demonstrator for Saftey-Critical Systems
2018 · Peter Rossler, Roland Holler, et al. · European Workshop on Microelectronics Education (EWME) · 2
Integration of high accurate Clock Synchronization into Ethernet-based Distributed Systems
2002 · Martin Horauer, Roland Höller, et al. · 2
Programmable logic devices – key components for today’s and tomorrow’s electronic-based systems
2019 · Peter Rössler, Roland Höller · e+i Elektrotechnik und Informationstechnik · 1
Comparative Analysis of High-Resolution Phase Measurement Principles for Picosecond Clock Synchronization
2025 · Roland Höller, Nikolaus Kerö, et al. · IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication
Field Programmable Analog Circuits and Arrays - An Overview
2021 · Philipp Jakisch, Christopher Krammer, et al. · International Conference on Electrical, Computer and Energy Technologies (ICECET)
Innovative Plattformen für Elektronische Systeme (INES)
2019 · Roland Höller, Peter Rössler
Safranextrakte im Ames-Test
2012 · Holler, Roland · University of Vienna
Eine neuartige Lösung für Test und Debugging in vernetzten eingebetteten Systemen
2010 · R. Höller, P. Rössler, et al. · e+i Elektrotechnik und Informationstechnik
Works count: 23
Citation count: 209
H-index: 7
I10-index: 5
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