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Vikas Rana
Observed name:
V. Rana
Institution:
STMicroelectronics (India)
Observed institution:
STMicroelectronics (India)
ORCID:
0000-0002-4599-7970
Observed ORCID:
0000-0002-4599-7970
OpenAlex ID:
A5060221913
Stress Relaxed Multiple Output High-Voltage Level Shifter
2017
·
Vikas Rana
, Rohan Sinha
·
IEEE Transactions on Circuits & Systems II Express Briefs
·
26
A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications
2018
·
Marco Pasotti
, Riccardo Zurla
, et al.
·
IEEE Journal of Solid-State Circuits
·
22
2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications
2019
·
M. Carissimi
, R. Zurla
, et al.
·
European Solid-State Circuits Conference (ESSCIRC)
·
10
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications
2017
·
M. Pasotti
, M. Carissimi
, et al.
·
European Solid-State Circuits Conference (ESSCIRC)
·
10
2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications
2019
·
M. Carissimi
, R. Mukherjee
, et al.
·
IEEE Solid-State Circuits Letters
·
8
Switched Capacitor based High Positive and Negative Voltage Charge-pump using Sample and Hold technique
2018
·
Vikas Rana
, Abhishek Mittal
·
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
·
5
Row decoder for embedded Phase Change Memory using low voltage transistors
2018
·
Vikas Rana
, Marco Pasotti
, et al.
·
Microelectronics Journal
·
5
Single charge-pump generating high positive and negative voltages driving common load
2017
·
Vikas Rana
, M. Pasotti
, et al.
·
IFIP/IEEE International Conference on Very Large Scale Integration
·
5
A 100MHz, 5.6pJ EPT, 1V to 15V full swing level shifter using low voltage transistors
2021
·
Vikas Rana
, Arpit Vijayvergia
·
Analog Integrated Circuits and Signal Processing
·
4
A 800MHz, 0.21pJ, 1.2V to 6V Level Shifter Using Thin Gate Oxide Devices in 65nm LSTP
2020
·
Prakhar Shukla
, Prabhat Singh
, et al.
·
IEEE International Conference on Electronics, Circuits and Systems (ICECS)
·
4
CMOS Oscillator Having Stable Frequency with Process, Temperature and Voltage Variation
2018
·
Vikas Rana
·
International Conference on VLSI Design
·
4
A novel DC-DC switched capacitor based voltage multiplier
2022
·
Shivam Kalla
, Vivek Tyagi
, et al.
·
Analog Integrated Circuits and Signal Processing
·
3
A 1 MHz PVT compensated RC oscillator with $$\hbox {8 ppm}/^{\circ }\hbox {C}$$ frequency stability
2020
·
Vivek Tyagi
, Shivam Kalla
, et al.
·
Analog Integrated Circuits and Signal Processing
·
2
Power Efficient Sense Amplifier For Emerging Non Volatile Memories
2020
·
Vivek Tyagi
, Vikas Rana
, et al.
·
International Conference on VLSI Design
·
2
-1.1V to +1.1V 3:1 Power Switch Architecture for Controlling Body Bias of SRAM Array in 28nm UTBB CMOS FDSOI
2016
·
Amit Chhabra
, Vikas Rana
·
International Conference on VLSI Design
·
2
Negative Voltage Generator and Current DAC Based Regulator For Flash Memory
2021
·
Vivek Tyagi
, Shivam Kalla
, et al.
·
International Conference on VLSI Design
·
1
Switched Capacitor Based Area Efficient Voltage Quadruple for High Pumping Efficiency
2020
·
Vikas Rana
, Shivam Kalla
·
IEEE International System-on-Chip Conference (SOCC)
·
1
Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology
2019
·
Vivek Tyagi
, Vikas Rana
, et al.
·
International Conference on VLSI Design
·
1
Switched Capacitor based Area Efficient Positive and Negative Voltage Multiplier
2018
·
Vikas Rana
·
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
·
1
Area Efficient NMOS Based Positive and Negative Voltage Multiplier
2018
·
Vikas Rana
·
IEEE Computer Society Annual Symposium on VLSI
·
1
Adaptive Forward Body Bias Voltage Generator
2021
·
Vivek Tyagi
, Vikas Rana
·
International Conference on VLSI Design
Sub-1V CMOS bandgap reference for ultra-low power applications
2018
·
Neha Dalal
, Mohammad S. Hashmi
, et al.
A 10 MHz, 73 ppm/°C, 84 µW PVT Compensated Ring Oscillator
2017
·
Vivek Tyagi
, M. S. Hashmi
, et al.
·
Communications in computer and information science
A 10 MHz, 42 ppm/ $$ ^{ \circ } {\text{C}} $$ , 69 μW PVT Compensated Latch Based Oscillator in BCD9S Technology for PCM
2017
·
Vivek Tyagi
, M. S. Hashmi
, et al.
·
Communications in computer and information science
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Works count:
24
Citation count:
117
H-index:
5
I10-index:
4
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