2024 · Jianyi Cheng, Samuel Coward, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · 30

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

2021 · Jianyi Cheng, Lana Josipovic, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 25

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POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations

2022 · Ruizhe Zhao, Jianyi Cheng, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 18

Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference?

2023 · Cheng Zhang, Jianyi Cheng, et al. · Conference on Empirical Methods in Natural Language Processing (EMNLP) · 16

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Dynamic Inter-Block Scheduling for HLS

2022 · Jianyi Cheng, Lana Josipovic, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 15

BitDecoding: Unlocking Tensor Cores for Long-Context LLMs with Low-Bit KV Cache

2026 · Dayou Du, Shijie Cao, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 13

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Finding and Finessing Static Islands in Dynamically Scheduled Circuits

2022 · Jianyi Cheng, John Wickerson, et al. · ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA) · 11

Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code

2021 · Jianyi Cheng, Shane T. Fleming, et al. · IEEE Transactions on Computers · 11

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Exploiting the Correlation between Dependence Distance and Latency in Loop Pipelining for HLS

2021 · Jianyi Cheng, John Wickerson, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 9

Probabilistic Scheduling in High-Level Synthesis

2021 · Jianyi Cheng, John Wickerson, et al. · IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) · 9

Phism: Polyhedral High-Level Synthesis in MLIR

2021 · Zhao, Ruizhe, Cheng, Jianyi · arXiv (Cornell University) · 9

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EASY

2019 · Jianyi Cheng, Shane T. Fleming, et al. · ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA) · 9

Adaptive CHERI Compartmentalization for Heterogeneous Accelerators

2025 · Jianyi Cheng, A. Theodore Markettos, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings · 8

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Parallelising Control Flow in Dynamic-scheduling High-level Synthesis

2023 · Jianyi Cheng, Lana Josipović, et al. · ACM Transactions on Reconfigurable Technology and Systems · 8

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Dynamic C-Slow Pipelining for HLS

2022 · Jianyi Cheng, John Wickerson, et al. · IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) · 7

ScaleHLS: Scalable High-Level Synthesis through MLIR

2021 · Hanchen Ye, Cong Hao, et al. · arXiv (Cornell University) · 7

HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator

2024 · Zhewen Yu, Sudarshan Sreeram, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 5

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A Dataflow Compiler for Efficient LLM Inference using Custom Microscaling Formats

2023 · Cheng, Jianyi, Zhang, Cheng, et al. · arXiv (Cornell University) · 5

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Balancing Static Islands in Dynamically Scheduled Circuits Using Continuous Petri Nets

2023 · Jianyi Cheng, Estibaliz Fraca, et al. · IEEE Transactions on Computers · 5

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eqsat: An Equality Saturation Dialect for Non-destructive Rewriting

2025 · Merckx, Jules, Lopoukhine, Alexandre, et al. · arXiv (Cornell University) · 4

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PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration

2023 · Alexander Montgomerie-Corcoran, Zhewen Yu, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 4

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Works count: 42

Citation count: 508

H-index: 11

I10-index: 13