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Yun-Yan Chung

ORCID: 0000-0002-7507-398X
Observed ORCID: 0000-0002-7507-398X
OpenAlex ID: A5060966071
First Demonstration of GAA Monolayer-MoS2 Nanosheet nFET with 410μA μ m ID 1V VD at 40nm gate length
2022 · Yun-Yan Chung, Bo-Jhih Chou, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 86
High On-State Current in Chemical Vapor Deposited Monolayer MoS2 nFETs With Sn Ohmic Contacts
2020 · Ang-Sheng Chou, Chao-Ching Cheng, et al. · IEEE Electron Device Letters · 73
First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate
2019 · Chao-Ching Cheng, Yun-Yan Chung, et al. · Symposium on VLSI Technology · 37
Monolayer-MoS 2 Stacked Nanosheet Channel with C-type Metal Contact
2023 · Yun-Yan Chung, Wei-Sheng Yun, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 29
Status and Performance of Integration Modules Toward Scaled CMOS with Transition Metal Dichalcogenide Channel
2023 · Ang-Sheng Chou, Ching-Hao Hsu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 27
High-performance monolayer MoS2 nanosheet GAA transistor
2023 · Bo-Jhih Chou, Yun-Yan Chung, et al. · Nanotechnology · 23
Pinning-Free Edge Contact Monolayer MoS2 FET
2020 · Terry Y.T. Hung, Shih-Yun Wang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 20
Stacked Channel Transistors with 2D Materials: An Integration Perspective
2024 · Yun-Yan Chung, Bo-Jhih Chou, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 13
Experimentally Determining the Top and Edge Contact Resistivities of Two-Step Sulfurization Nb-Doped MoS 2 Films Using the Transmission Line Measurement
2019 · Yun-Yan Chung, Chi-Feng Li, et al. · IEEE Electron Device Letters · 12
Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiO$_{{x}}$ /Si Substrates Using Area-Selective CVD Technology
2019 · Yun-Yan Chung, Jia-Min Shieh, et al. · IEEE Transactions on Electron Devices · 11
Low-Power CMOS Inverter with Enhancement-Mode Operation and Matched $\mathrm{V}_{\text{TH}}$ at $\mathrm{V}_{\text{DD}} =1\ \mathrm{V}$ on Monolayer 2D Material Channel
2024 · Ang-Sheng Chou, Ching-Hao Hsu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 7
Electrical Characteristics of Si0.8Ge0.2 p-MOSFET With TMA Pre-Doping and NH3 Plasma IL Treatment
2022 · Meng-Chien Lee, Nien-Ju Chung, et al. · IEEE Transactions on Electron Devices · 7
High-Accuracy Deep Neural Networks Using a Contralateral-Gated Analog Synapse Composed of Ultrathin MoS₂ nFET and Nonvolatile Charge-Trap Memory
2020 · Yun-Yan Chung, Chao-Ching Cheng, et al. · IEEE Electron Device Letters · 7
Demonstration of HfO2-Based Gate Dielectric With Low Interface State Density and Sub-nm EOT on Ge by Incorporating Ti Into Interfacial Layer
2018 · Yi-He Tsai, Chen-Han Chou, et al. · IEEE Electron Device Letters · 6
Study of the Band Alignment between Atomic-Layer-Deposited High-κ Dielectrics and MoS2Film
2018 · Yun-Yan Chung, Ming-Li Tsai, et al. · ECS Journal of Solid State Science and Technology · 5
Enhanced Interlayer Coupling in Few-Layer MoS2 via Stacking of CVD-Grown Monolayers
2025 · Bo-Jhih Chou, Yu-I Chang, et al. · ACS Applied Engineering Materials · 4
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Switchable NAND and NOR Logic Computing in Single Triple-Gate Monolayer MoS2 n-FET
2020 · Yun-Yan Chung, Chao-Ching Cheng, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 4
Bismuth Confinement: A Strategy for Low Resistance and Good Thermal Endurance of Integrated Contacts to MoS 2
2026 · Wen-Chia Wu, Terry Y. T. Hung, et al. · ACS Nano · 3
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Mechanics of Integration and Component Performance Step-up for Nanosheet Transistors with Ultrathin 2D Channel
2025 · Terry Y.T. Hung, Shu-Jui Chang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 2
Comparison of Experimentally Extracted Top and Edge Contact Resistivity by TLM Structure with Two-step Sulfurization Nb-Doped MoS2
2019 · Chi-Feng Li, Yun-Yan Chung, et al. · IEEE Electron Devices Technology & Manufacturing Conference (EDTM) · 1
Prospects and Challenges for Two-Dimensional Transition Metal Dichalcogenide Based Logic Devices
2026 · Terry Y.T. Hung, Shu-Jui Chang, et al. · IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
Fabrication and Characterization of an In 0.53Gao.,,As/InP Photon Transport Transistor
1993 · Yun-Yan Chung, R.M. Derosier, et al.
Works count: 22
Citation count: 377
H-index: 10
I10-index: 10
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