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Anping Jiang

The low power design of SM4 cipher with resistance to differential power analysis
2015 · Yanbo Niu, Anping Jiang · International Symposium on Quality Electronic Design (ISQED) · 14
A Novel Parallel Processing Architecture for Deblocking Filter in H.264 Using Vertical MB Filtering Order
2006 · Yue-xi Zhao, An-ping Jiang · IEEE International Conference on Solid-State and Integrated Circuit Technology · 7
The power dissipation comparison of different ALU architectures
2010 · Junkai Sun, Anping Jiang · International Conference on Mechanical and Electrical Technology · 6
Design of FFT processor with low power complex mutliplier for OFDM-based high-speed wireless applications
2005 · Miu Jiang, Bing Yang, et al. · International Symposium on Communications and Information Technologies · 6
A Digital Channelized Receiver with Overlapped Passband for Accurate Signal Restoration
2021 · Qian Tian, Anping Jiang, et al. · IEEE International Conference on Computer and Communications (ICCC) · 4
A high-speed dual field arithmetic unit and hardware implementation
2007 · Jian Wang, Anping Jiang · IEEE International Conference on ASIC (ASICON) · 3
Design and FPGA Implementation of a Digital Channelized Receiver
2022 · Qian Tian, Anping Jiang, et al. · International Conference on Information Communication and Software Engineering (ICICSE) · 2
Partitioned bus-invert coding for power consumption optimization of data bus
2011 · Junkai Sun, Anping Jiang · International Conference on Computer Research and Development · 2
Design of a high-resolution Time-to-Digital converter chip
2016 · Anping Jiang, Yanbo Niu, et al. · IEEE International Conference on Solid-State and Integrated Circuit Technology · 1
The design of an IEEE802.11 WLAN hardware MAC
2005 · Anping Jiang, Fang Ren, et al. · IEEE International Conference on Solid-State and Integrated Circuit Technology · 1
A High-Precision LOS Detection Circuit Design Based on a Gilbert Multiplier
2026 · Zhirui Wang, Anping Jiang, et al. · International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE)
Design of an on-chip automatic power control circuit for hundred-gigabits optical transceiver
2025 · Zhaoyang Sun, Shanshan Sun, et al. · International Conference on Optoelectronic Information and Optical Engineering (OIOE)
A 12-bit SAR ADC for hundred-gigabits optical transceiver with automatic power control and temperature sensing
2025 · Zhaoyang Sun, Anping Jiang, et al. · International Conference on Optoelectronic Materials and Devices (ICOMD)
The Research on Power Dissipation of Different ALU Implementation Schemes
2011 · Anping Jiang · Microprocessors
An Area-Efficient Design for Modular Inversion in GF(2m)
2006 · Jian Wang, Anping Jiang · IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
A High-Speed Area-Efficient Architecture for the Arithmetic in GF(2m)
2006 · Jian Wang, Anping Jiang · IEEE International Conference on Solid-State and Integrated Circuit Technology
Works count: 16
Citation count: 46
H-index: 4
I10-index: 1
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