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Mengming Li

AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2024 · Wenji Fang, Mengming Li, et al. · IEEE LLM Aided Design Workshop (LAD) · 61
AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2024 · Fang, Wenji, Li, Mengming, et al. · arXiv (Cornell University) · 56
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OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation
2024 · Shang Liu, Yao Lu, et al. · 52
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AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2025 · Zhiyuan Yan, Wenji Fang, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 46
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SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model
2025 · Mengming Li, Wenji Fang, et al. · International Symposium of Electronics Design Automation (ISEDA) · 35
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unXpec: Breaking Undo-based Safe Speculation
2022 · Mengming Li, Chenlu Miao, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 11
Hitchhiker: Accelerating ORAM With Dynamic Scheduling
2023 · Jingsen Zhu, Mengming Li, et al. · IEEE Transactions on Computers · 10
TreasureCache: Hiding Cache Evictions Against Side-Channel Attacks
2024 · Mengming Li, Kai Bu, et al. · IEEE Transactions on Dependable and Secure Computing · 8
Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency
2025 · Mengming Li, Qijun Zhang, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 6
SwiftDir: Secure Cache Coherence without Overprotection
2022 · Chenlu Miao, Kai Bu, et al. · IEEE/ACM International Symposium on Microarchitecture (MICRO) · 5
Profile-Guided Temporal Prefetching
2025 · Mengming Li, Qijun Zhang, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings · 4
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FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling
2025 · Qijun Zhang, Mengming Li, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 4
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AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling
2025 · Qijun Zhang, Yao Lu, et al. · ACM/IEEE Design Automation Conference (DAC) · 3
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An Architecture-Level CPU Modeling Framework for Power and Other Design Qualities
2024 · Qijun Zhang, Mengming Li, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 3
A Self-Supervised and Cross-Design Netlist Power Model for Time-Based Layout Power Analysis
2026 · Wenkai Li, Yao Lu, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2
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TomasuLLM: Out-of-Order Speculative Execution for LLM Agents
2026 · Yu, Jiangnan, Xu, Ceyu, et al. · arXiv (Cornell University)
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Memory Compression for High-Fanout Agent Sandboxes
2026 · Li, Mengming, XU, Ceyu, et al. · arXiv (Cornell University)
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ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses
2026 · Mengming Li, Chenlu Miao, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings
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PF-LLM: L arge L anguage M odel Hinted Hardware P re f etching
2026 · Ceyu Xu, Xiangfeng Sun, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework
2026 · Qijun Zhang, Shang Liu, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC)
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ArchPower: Dataset for Architecture-Level Power Modeling of Modern CPU Design
2025 · Zhang, Qijun, Lu, Yao, et al. · arXiv (Cornell University)
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ArchPower: Dataset for Architecture-Level Power Modeling of Modern CPU Design
2025 · Qijun Zhang, Yao Lu, et al. · neural information processing systems
Works count: 24
Citation count: 306
H-index: 8
I10-index: 7
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