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Author

Shashank Alevoor

ORCID: 0000-0001-6766-5638
Observed ORCID: 0000-0001-6766-5638
OpenAlex ID: A5066797388
A 95.2% Efficiency DC–DC Boost Converter Using Peak Current Fast Feedback Control (PFFC) for Improved Load Transient Response
2022 · Shashank Alevoor, Rakshit Dambe Nayak, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 19
An Active EMI Cancellation Technique Achieving a 25-dB Reduction in Conducted EMI of LIN Drivers
2022 · Abhishek Ray, Raveesh Magod, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 8
A Novel Parallel Feed-Forward Current Ripple Rejection (PFFCRR) Technique for High Load Current High PSRR nMOS LDOs
2024 · Yuhong Lu, Ting-An Yen, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 7
A Buck Converter Using Auxiliary-Stage With Multiple-Single-Cycle Non-Linear Control (MSCNLC) for Fast Load Transient Response
2024 · Fan Guo, Shashank Alevoor, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 7
A Ripple Reduction Technique for Single Stage Switched Capacitor Converter in Ultra Low-Power Applications
2024 · Rakshit Dambe Nayak, Shashank Alevoor, et al. · IEEE Access · 2
A 93% Efficiency Delay Hysteretic Buck Converter With Ring Oscillator Based Frequency Synchronization and No-Load Operating Iq of 5.17 μA
2025 · Rakshit Dambe Nayak, Shashank Alevoor, et al. · IEEE Transactions on Power Electronics · 1
VLSI implementation of efficient image watermarking algorithm
2015 · Suraj Kumar Dhanuka, Priyam Sachdeva, et al. · IEEE International Advance Computing Conference · 1
Works count: 7
Citation count: 45
H-index: 4
I10-index: 1
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