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Marc Boulé

Observed names: Boulé, Marc, Boulé, Marc, M Boulé, M. Boule, Marc Boule
ORCID: 0009-0007-1290-6669
Observed ORCID: 0009-0007-1290-6669
OpenAlex ID: A5068027997
Automata-based assertion-checker synthesis of PSL properties
2008 · Marc Boulé, Zeljko Zilic · ACM Transactions on Design Automation of Electronic Systems · 96
Genetic Resistance/Susceptibility to Mycobacteria: Phenotypic Expression in Bone Marrow Derived Macrophage Lines
1991 · D Radzioch, T Hudson, et al. · Journal of Leukocyte Biology · 79
Generating Hardware Assertion Checkers
2008 · Marc Boulé, Zeljko Zilic · Springer eBooks · 77
Incorporating efficient assertion checkers into hardware emulation
2006 · M. Boule, Z. Zilic · Proceedings, IEEE International Conference on Computer Design/Proceedings - IEEE International Conference on Computer Design · 58
Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug
2006 · Marc Boule, Jean-Samuel Chenard, et al. · Proceedings, IEEE International Conference on Computer Design/Proceedings - IEEE International Conference on Computer Design · 56
Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties
2006 · Marc Boule, Zeljko Zilic · Proceedings · 47
Efficient Automata-Based Assertion-Checker Synthesis of SEREs for Hardware Emulation
2007 · Marc Boule, Zeljko Zilic · Asia and South Pacific Design Automation Conference (ASP-DAC) · 33
MYGEN
2009 · Yann Oddos, Katell Morin-Allory, et al. · ACM Great Lakes Symposium on VLSI (GLSVLSI) · 10
Efficient Data Encoding for Improving Fault Simulation Performance on GPUs
2013 · Jason G. Tong, Marc Boulé, et al. · International Symposium on Electronic System Design · 9
Defining and Providing Coverage for Assertion-Based Dynamic Verification
2010 · Jason G. Tong, Marc Boulé, et al. · Journal of Electronic Testing · 9
An FPGA based move generator for the game of chess
2003 · M. Boule, Z. Zilic · IEEE Custom Integrated Circuits Conference (CICC) · 9
Test compaction techniques for assertion-based test generation
2013 · Jason G. Tong, Marc Boulé, et al. · ACM Transactions on Design Automation of Electronic Systems · 7
Airwolf-TG: A test generator for assertion-based dynamic verification
2009 · Jason G. Tong, Marc Boule, et al. · Proceedings · 7
The role of Finite Element Method software in the teaching of electromagnetics
2014 · Marc Boule · Interdisciplinary Engineering Design Education Conference (IEDEC) · 6
Validating Assertion Language Rewrite Rules and Semantics With Automated Theorem Provers
2010 · Katell Morin-Allory, Marc Boule, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 6
Generating compact assertions for control-based logic signals
2011 · Jason G. Tong, Danny Sarraf, et al. · Conference proceedings · 3
DC power transported by two infinite parallel wires
2023 · Marc Boulé · American Journal of Physics · 2
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Assertion checkers - enablers of quality design
2008 · Marc Boule, Zeljko Zilic · 2
An Fpga Move Generator for the Game of Chess
2002 · Marc Boulé, Zeljko Zilic · ICGA Journal · 2
Mu-GSIM: A mutation testing simulator on GPUs
2013 · Jason G. Tong, Marc Boulé, et al. · Asia Symposium on Quality Electronic Design · 1
RLC parameters of a two-wire line with the finite element method
2026 · Marc Boulé · Canadian Journal of Physics
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Accelerating assertion assessment using GPUs
2016 · Jason G. Tong, Marc Boule, et al. · Proceedings
Physique des ondes
2005 · André St-Amand, Marc Boulé
An FPGA move generator for the game of chess /
2002 · Boulé, Marc · eScholarship@McGill (McGill)
Works count: 37
Citation count: 520
H-index: 9
I10-index: 8
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