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Ashok Swaminathan

Observed name: A. Swaminathan
OpenAlex ID: A5068985428
Spurious -Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4GHz Fractional-N PLL
2008 · Kevin J. Wang, Ashok Swaminathan, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 129
Spurious Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4 GHz Fractional-N PLL
2008 · Kevin J. Wang, Ashok Swaminathan, et al. · IEEE Journal of Solid-State Circuits · 124
A Wide-Bandwidth 2.4 GHz ISM Band Fractional-$N$ PLL With Adaptive Phase Noise Cancellation
2007 · Ashok Swaminathan, Kevin J. Wang, et al. · IEEE Journal of Solid-State Circuits · 124
A Digital Requantizer With Shaped Requantization Noise That Remains Well Behaved After Nonlinear Distortion
2007 · Ashok Swaminathan, Andrea Panigada, et al. · IEEE Transactions on Signal Processing · 65
A 22 mW Bluetooth RF transceiver with direct RF modulation and on-chip IF filtering
2002 · N. Filiol, N. Birkett, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 53
A Wide-Bandwidth 2.4GHz ISM-Band Fractional-N PLL with Adaptive Phase-Noise Cancellation
2007 · Ashok Swaminathan, Kevin J. Wang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 20
A monolithic complex sigma-delta modulator for digital radio
2005 · A. Swaminathan, M. Snelgrove, et al. · IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design · 11
Fractional-N Direct Digital Frequency Synthesis with a 1-Bit Output
2006 · Jeremy Rode, Ashok Swaminathan, et al. · IEEE MTT-S International Microwave Symposium digest · 6
A Single-IF Receiver Architecture Using a Complex Sigma-Delta Modulator
1997 · Ashok Swaminathan · 5
1.2 V 0.18 µm CMOS imager with column-level oversampling
2001 · Jared Fortier, N. G. Tarr, et al. · European Solid-State Circuits Conference (ESSCIRC) · 3
A Single-IF receiver architecture using a complex Sigma-Delta modular.
1997 · Ashok Swaminathan · 1
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Electrical Engineering (Electronic Circuits and Systems)
2010 · Ashok Swaminathan, P.M. Asbeck, et al.
Enabling techniques for low power, high performance fractional-N frequency synthesizers
2006 · Ashok Swaminathan · eScholarship (California Digital Library)
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A low power ΣΔ analog-to-digital modulator with 50 MHz sampling rate in a 0.25 μm SOI CMOS technology
2003 · A. Swaminathan, N. Fong, et al. · IEEE International SOI Conference (SOI)
Works count: 14
Citation count: 541
H-index: 7
I10-index: 7
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