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Toshiyuki Kouchi

ORCID: 0000-0002-4616-1366
Observed ORCID: 0000-0002-4616-1366
OpenAlex ID: A5069264873
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with t PROG =75µs and t R =4µs
2020 · Toshiyuki Kouchi, Noriyasu Kumazaki, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 20
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs
2020 · Toshiyuki Kouchi, Mami Kakoi, et al. · IEEE Journal of Solid-State Circuits · 11
A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os
2025 · Kosuke Yanagidaira, Mario Sako, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7
Novel approach for search engine
2016 · Yoichi Sato, Kanji Otsuka, et al. · International Microsystems, Packaging, Assembly and Circuits Technology Conference · 7
A 2Tb 4b/Cell 6-Plane 3D-Flash Memory with 37.6Gb/mm 2 Bit Density and >85MB/s Write Throughput
2026 · Jayanth M. Thimmaiah, Ryuji Yamashita, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2
A 29-Gb/mm 2 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology
2025 · Kosuke Yanagidaira, Mario Sako, et al. · IEEE Journal of Solid-State Circuits · 2
A Multi Stacked Cell Array (MSA) Structure with an Up-Down Crossed Bit Line Architecture (Ud-CBL) in 3D Flash Memory
2026 · Hiroshi Maejima, Katsuaki Isobe, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
サーチエンジンのための新しいアプローチ【Powered by NICT】
2016 · Yoichi Sato, Kanji Ōtsuka, et al. · IEEE Conference Proceedings
Works count: 8
Citation count: 49
H-index: 4
I10-index: 2
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