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Eric Dellinger
Observed name:
Dellinger, Eric
Observed institutions:
University of Washington,
Xilinx (United States),
Xilinx (Ireland)
OpenAlex ID:
A5070616806
CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures
2008
·
Andrew Putnam
, Dave Bennett
, et al.
·
International Conference on Field Programmable Logic and Applications (FPL)
·
50
CHiMPS
2008
·
Andrew R. Putnam
, Dave Bennett
, et al.
·
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
·
48
Performance and power of cache-based reconfigurable computing
2009
·
Andrew Putnam
, Susan Eggers
, et al.
·
Proceedings - International Symposium on Computer Architecture/Proceedings
·
33
Microscaling Data Formats for Deep Learning
2023
·
Rouhani, Bita Darvish
, Zhao, Ritchie
, et al.
·
arXiv (Cornell University)
·
19
PDF
Performance and power of cache-based reconfigurable computing
2009
·
Andrew Putnam
, Susan Eggers
, et al.
·
ACM SIGARCH Computer Architecture News
·
19
Generating layouts for self-implementing modules
1998
·
James Hwang
, Cameron Patterson
, et al.
·
Lecture notes in computer science
·
11
Performance and power of cache-based reconfigurable computing
2009
·
Andrew Putnam
, Susan Eggers
, et al.
·
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
·
6
Error Diffusion: Post Training Quantization with Block-Scaled Number Formats for Neural Networks
2024
·
Khodamoradi, Alireza
, Denolf, Kristof
, et al.
·
arXiv (Cornell University)
PDF
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Works count:
8
Citation count:
186
H-index:
6
I10-index:
6
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