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Xiaoyang Lu

Observed name: Lu, Xiaoyang
Observed institution: Illinois Institute of Technology
ORCID: 0009-0005-9481-7234
Observed ORCID: 0009-0005-9481-7234
OpenAlex ID: A5071271406
CHROME: Concurrency-Aware Holistic Cache Management Framework with Online Reinforcement Learning
2024 · Xiaoyang Lu, Hamed Najafi, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 27
CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications
2021 · Liang Yan, Mingzhe Zhang, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 22
ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations
2024 · Xiaoyang Lu, Boyu Long, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · 16
The Memory-Bounded Speedup Model and Its Impacts in Computing
2023 · Xian-He Sun, Xiaoyang Lu · Journal of Computer Science and Technology · 15
CARE: A Concurrency-Aware Enhanced Lightweight Cache Management Framework
2023 · Xiaoyang Lu, Rujia Wang, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 12
APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis
2020 · Xiaoyang Lu, Rujia Wang, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 10
Premier: A Concurrency-Aware Pseudo-Partitioning Framework for Shared Last-Level Cache
2021 · Xiaoyang Lu, Rujia Wang, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 7
Pyramid: Accelerating LLM Inference With Cross-Level Processing-in-Memory
2025 · Liang Yan, Xiaoyang Lu, et al. · IEEE Computer Architecture Letters · 4
A Generalized Model for Modern Hierarchical Memory System
2022 · Hamed Najafi, Jason Liu, et al. · Winter Simulation Conference · 3
ProMiner: Enhancing Locality, Parallelism, and Offloading for Graph Mining on Processing-in-Memory Systems
2025 · Liang Yan, Xiaoyang Lu, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2
DeepSim: A Transformer Based Model For Fast Simulation And Exploring Computer System Design Space
2023 · Hamed Najafi, Xiaoyang Lu · ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation (PADS) · 2
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I/O Analysis is All You Need: An I/O Analysis for Long-Sequence Attention
2026 · Xiaoyang Lu, Boyu Long, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · 1
AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System
2024 · Liang Yan, Xiaoyang Lu, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 1
Event2Reward: Learning Robotic Rewards from Progress Relations
2026 · Nie, Junnan, Fan, Zitian, et al. · arXiv (Cornell University)
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DynaNDE: Dynamic Near-Data Expert Scheduling for Batched MoE Inference
2026 · Lu, Xiaoyang, Pai, Belthangady Akash Vi Narayana, et al. · arXiv (Cornell University)
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VIPER: Architecture-Aware Performance Modeling for Processing-in-Memory Design-Space Exploration
2026 · Geng, Haoran, Pereira, Tomas Sousa, et al. · arXiv (Cornell University)
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I/O-Aware PIM Acceleration for Long-Sequence LLM Inference with Hybrid Sparse Attention
2026 · Xiaoyang Lu, Lihan Hu, et al. · IEEE International Parallel and Distributed Processing Symposium (IPDPS)
Zion: A Comprehensive, Adaptive, and Lightweight Hardware Prefetcher
2026 · Vadim Biryukov, Xiaoyang Lu, et al. · Design, Automation, and Test in Europe
COSMOS: RL-Enhanced Locality-Aware Counter Cache Optimization for Secure Memory
2025 · Haoran Geng, Xiaoyang Lu, et al. · IEEE/ACM International Symposium on Microarchitecture (MICRO)
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Concurrency-Aware Cache Miss Cost Prediction with Perceptron Learning
2025 · Yuping Wu, Xiaoyang Lu, et al. · ACM Great Lakes Symposium on VLSI (GLSVLSI)
Works count: 20
Citation count: 122
H-index: 7
I10-index: 6
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