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Chongfei Shen

OpenAlex ID: A5072650658
An Efficient Hardware Accelerator for Block Sparse Convolutional Neural Networks on FPGA
2023 · Xiaodi Yin, Zhipeng Wu, et al. · IEEE Embedded Systems Letters · 26
Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM Systems
2023 · Dejian Li, Xi Feng, et al. · IEEE Embedded Systems Letters · 5
A QSPI Interface Supporting ‘Bits-Decoding’ for High-Speed Access to Flash
2022 · Yu Zhang, Chongfei Shen, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) · 5
Clock mesh synthesis through dynamic programming with physical parameters consideration
2024 · Dejian Li, Jie Gan, et al. · Integration · 4
A Novel Predictor with Optimized Sampling Method for Hardware-aware NAS
2022 · Yue Hu, Chongfei Shen, et al. · Proceedings - International Conference on Pattern Recognition/Proceedings/International Conference on Pattern Recognition · 4
Simulink Modeling and Performance Verification of a High Resolution Zoom ADC
2019 · Jie Gao, Chongfei Shen, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) · 2
Simulink Modeling and Performance Verification of 2.4-GHz Fractional-N Reference Oversampling PLL with 20-MHz Loop Bandwidth
2023 · Zijing Yuan, Chongfei Shen, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) · 1
A 2nd-Order Noise-Shaping SAR ADC with Reused Dynamic Amplifier Assisted Integrator
2023 · Zhiyu Wang, Chongfei Shen, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) · 1
Clock Mesh Synthesis Methodology Based on Combinatorial Optimization
2023 · Dejian Li, Xi Feng, et al. · Preprints.org · 1
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A Voltage Error Quantizer For Digital Low Dropout Regulators With Fast Transient Response and Low Steady-State Error
2022 · Kaize Zhou, Dejian Li, et al. · IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) · 1
Modeling Digital Low-Dropout Regulator with a Multiple Sampling Frequency Circuit Technology
2019 · Jiarong Geng, Baodong Yu, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) · 1
PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System
2024 · Meng Liu, Fei Xiao, et al. · IEEE Embedded Systems Letters
A SAR-Based Fast Automatic Digital Calibration Circuit of On-Chip Clock
2023 · Xiaotian Lin, Chongfei Shen, et al. · IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)
Microcavity with Output Waveguide by Different Connection Angles
2023 · Xin Jin, Sihai Qiu, et al. · International Forum on Electrical Engineering and Automation (IFEEA)
CTA: A Critical Task Aware Scheduling Mechanism for Dataflow Architecture
2020 · Yan Ou, Chongfei Shen, et al. · Lecture notes in computer science
A High-Accuracy Digital Low-Dropout Regulator with Limit Cycle Oscillation Reduction Technique
2019 · Hongda Zhang, Baodong Yu, et al. · IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)
Ultra Miniature MEMS/Satellite Integrated Navigation System
2012 · Peisheng Wang, Lidong Lan, et al. · Lecture notes in electrical engineering
Works count: 17
Citation count: 51
H-index: 4
I10-index: 1
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