Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Jebashini Ponnian
Observed names:
Ponnian Jebashini,
Ponnian, Jebashini
Observed institution:
Kuala Lumpur University of Science & Technology
ORCID:
0000-0002-8798-0675
Observed ORCID:
0000-0002-8798-0675
OpenAlex ID:
A5075105772
New low power adders in Self Resetting Logic with Gate Diffusion Input Technique
2014
·
R. Uma
, Jebashini Ponnian
, et al.
·
Journal of King Saud University - Engineering Sciences
·
13
PDF
A New Systematic GDI Circuit Synthesis Using MUX Based Decomposition Algorithm and Binary Decision Diagram for Low Power ASIC Circuit Design
2020
·
Jebashini Ponnian
, Senthil Pari
, et al.
·
Microelectronics Journal
·
11
Systolic FIR Filter Design with Various Parallel Prefix Adders in FPGA: Performance Analysis
2012
·
R. Uma
, Jebashini Ponnian
·
International Symposium on Electronic System Design
·
7
A Unified Power-Delay Model for GDI Library Cell Created Using New Mux Based Signal Connectivity Algorithm
2023
·
Jebashini Ponnian
, Senthil Pari
, et al.
·
Emerging Science Journal
·
3
PDF
A Unified Libraries for GDI Logic to Achieve Low-Power and High-Speed Circuit Design
2022
·
Jebashini Ponnian
, Senthil Pari
, et al.
·
Lecture notes in electrical engineering
·
2
Design and Analysis of a True Random Number Generation for Secure IoT Applications
2026
·
Vishnupriya Shivakumar
, Chinnaiyan Senthilpari
, et al.
·
Preprints.org
Design a low-power and high-speed applications circuit using standard Gate Diffusion Input library cell
2023
·
Ponnian, Jebashini
·
Siti Hasmah Digital Library-MMU Institutiona Repository (Multimedia University)
Introducing a New Mux Based Signal Connectivity and Delay- Power Model for Gate Diffusion Input Technique
2022
·
Jebashini Ponnian
, Senthil Pari
, et al.
·
Research Square
PDF
A new recursive shared segmented split multiply-accumulate unit for high speed digital signal processing applications
2016
·
Uma Ramadass
, Jebashini Ponnian
, et al.
·
International Electronics Symposium (IES)
新しい再帰的は高速ディジタル信号処理応用のためのセグメント分割乗算‐積算ユニットを共有する【Powered by NICT】
2016
·
Ramadass Uma
, Ponnian Jebashini
, et al.
·
IEEE Conference Proceedings
Show more works
View as search
Works count:
10
Citation count:
36
H-index:
3
I10-index:
2
Year
Topic
Type