Get started
Author

C. Kim

Observed name: Chanbae Kim
OpenAlex ID: A5075519836
Overview of Bias Temperature Instability in Scaled DRAM Logic for Memory Transistors
2020 · B. J. O'Sullivan, R. Ritzenthaler, et al. · IEEE Transactions on Device and Materials Reliability · 16
Impact of Dimensions of Memory Periphery FinFETs on Bias Temperature Instability
2020 · Mohamed Boubaaya, B. J. O'Sullivan, et al. · IEEE Transactions on Device and Materials Reliability · 11
Reliability Engineering Enabling Continued Logic for Memory Device Scaling
2019 · B. J. O'Sullivan, D. Linten, et al. · IEEE International Integrated Reliability Workshop final report · 7
224 Tops/W-Level Analog Computation in Memory Cell Using Hybrid Ferroelectric Tunnel Junction Having Enhanced on-State Conductance
2025 · Won-Tae Koo, Sangmin Lee, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 1
Works count: 4
Citation count: 35
H-index: 3
I10-index: 2
Year
Topic
Type