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Zhiyao Xie
Observed names:
Lei Chen,
Xie, Zhiyao
Institution:
Hong Kong University of Science and Technology
Observed institutions:
Duke University,
Hong Kong University of Science and Technology,
Indian Institute of Technology Goa,
The Hong Kong University of Science and Technology (Guangzhou)
ORCID:
0000-0002-4442-592X
Observed ORCID:
0000-0002-4442-592X
OpenAlex ID:
A5075696558
RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model
2024
·
Yao Lu
, Shang Liu
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
284
PDF
RouteNet
2018
·
Zhiyao Xie
, Yu-Hung Huang
, et al.
·
225
RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution
2024
·
Shang Liu
, Wenji Fang
, et al.
·
IEEE LLM Aided Design Workshop (LAD)
·
166
PDF
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network
2020
·
Zhiyao Xie
, Haoxing Ren
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
115
PDF
RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique
2024
·
Shang Liu
, Wenji Fang
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
101
Large circuit models: opportunities and challenges
2024
·
Lei Chen
, Yiqi Chen
, et al.
·
Science China Information Sciences
·
86
PDF
APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors
2021
·
Zhiyao Xie
, Xiaoqing Xu
, et al.
·
IEEE/ACM International Symposium on Microarchitecture (MICRO)
·
65
PDF
AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2024
·
Wenji Fang
, Mengming Li
, et al.
·
IEEE LLM Aided Design Workshop (LAD)
·
61
Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model
2019
·
Yu-Hung Huang
, Zhiyao Xie
, et al.
·
Design, Automation, and Test in Europe
·
61
MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
2023
·
Wenji Fang
, Yao Lu
, et al.
·
59
PDF
AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2024
·
Fang, Wenji
, Li, Mengming
, et al.
·
arXiv (Cornell University)
·
56
PDF
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning
2020
·
Zhiyao Xie
, Guan-Qi Fang
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
56
PDF
OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation
2024
·
Shang Liu
, Yao Lu
, et al.
·
52
PDF
Fast IR drop estimation with machine learning
2020
·
Zhiyao Xie
, Hai Li
, et al.
·
48
PDF
Preplacement Net Length and Timing Estimation by Customized Graph Neural Network
2022
·
Zhiyao Xie
, Rongjian Liang
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
47
AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
2025
·
Zhiyuan Yan
, Wenji Fang
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
46
PDF
Net2
2021
·
Zhiyao Xie
, Rongjian Liang
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
44
PDF
Routing-free crosstalk prediction
2020
·
Rongjian Liang
, Zhiyao Xie
, et al.
·
40
A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
2026
·
Wenji Fang
, Jing Wang
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
39
SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model
2025
·
Mengming Li
, Wenji Fang
, et al.
·
International Symposium of Electronics Design Automation (ISEDA)
·
35
PDF
Automatic Routability Predictor Development Using Neural Architecture Search
2021
·
Chen-Chia Chang
, Jingyu Pan
, et al.
·
International Conference on Computer Aided Design
·
28
PDF
NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
2025
·
Wenji Fang
, Wenkai Li
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
20
PDF
FADO: F loorplan- A ware D irective O ptimization for High-Level Synthesis Designs on Multi-Die FPGAs
2023
·
Linfeng Du
, Tingyuan Liang
, et al.
·
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
·
16
PDF
Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation Techniques
2024
·
Wenji Fang
, Yao Lu
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
15
PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions
2023
·
Qijun Zhang
, Shiyu Li
, et al.
·
15
PDF
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Works count:
94
Citation count:
1,997
H-index:
21
I10-index:
33
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