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Abhishek Acharya

ORCID: 0000-0002-6342-667X
Observed ORCID: 0000-0002-6342-667X
OpenAlex ID: A5076689002
Impact of Gate–Source Overlap on the Device/Circuit Analog Performance of Line TFETs
2019 · Abhishek Acharya, A. B. Solanki, et al. · IEEE Transactions on Electron Devices · 33
Drain Current Saturation in Line Tunneling-Based TFETs: An Analog Design Perspective
2017 · Abhishek Acharya, Abhishek B. Solanki, et al. · IEEE Transactions on Electron Devices · 29
Investigation of Self-Heating Effect in Tree-FETs by Interbridging Stacked Nanosheets: A Reliability Perspective
2022 · Shobhit Srivastava, M. Shashidhara, et al. · IEEE Transactions on Device and Materials Reliability · 28
Proposal and Investigation of Area Scaled Nanosheet Tunnel FET: A Physical Insight
2022 · Shobhit Srivastava, Sourabh Panwar, et al. · IEEE Transactions on Electron Devices · 21
Performance Evaluation of High-κ Dielectric Ferro-Spacer Engineered Si/SiGe Hetero-Junction Line TFETs: A TCAD Approach
2023 · Sourabh Panwar, Shobhit Srivastava, et al. · IEEE Transactions on Dielectrics and Electrical Insulation · 19
Influences of Source/Drain Extension Region on Thermal Behavior of Stacked Nanosheet FET
2024 · Shobhit Srivastava, Sourabh Panwar, et al. · IEEE Transactions on Electron Devices · 14
Understanding the Impact of Extension Region on Stacked Nanosheet FET: Analog Design Perspective
2023 · Shobhit Srivastava, M. Shashidhara, et al. · Solid-State Electronics · 14
Exploration of 9T SRAM Cell for In Memory Computing Application
2021 · Aman Kumar Gupta, Abhishek Acharya · Devices for Integrated Circuit (DevIC) · 14
A Novel ${{V}}_{\textsf {DSAT}}$ Extraction Method for Tunnel FETs and Its Implication on Analog Design
2016 · Abhishek Acharya, Sudeb Dasgupta, et al. · IEEE Transactions on Electron Devices · 14
Investigation of Field-Free Switching of 2-D Material-Based Spin–Orbit Torque Magnetic Tunnel Junction
2023 · M. Shashidhara, Vikas Nehra, et al. · IEEE Transactions on Electron Devices · 12
Interface Trap Charges Analysis on DC and High Frequency Characteristics of UTBB-FDSOI FET
2022 · Bhaskar Awadhiya, Shivendra Yadav, et al. · Silicon · 10
Impact of Unconventional Torque on the Performance of Weyl-Semimetal-Based SOT-MTJ: A Micromagnetic Study
2024 · Shashidhara M, Shobhit Srivatsava, et al. · IEEE Transactions on Electron Devices · 7
Performance Investigation of Source/Drain Extension Region on Nanosheet FET: A Digital Design Perspective
2023 · Shobhit Srivastava, Sourabh Panwar, et al. · Silicon Nanoelectronics Workshop (SNW) · 7
Performance optimization of epitaxial-layer based Si/SiGe hetero-junction area scaled tunnel FET label-free biosensors considering steric hindrance
2023 · Sourabh Panwar, Shobhit Srivastava, et al. · Solid-State Electronics · 4
Challenges and future scope of gate-all-around (GAA) transistors
2023 · Shobhit Srivastava, Abhishek Acharya · CRC Press eBooks · 4
Investigation of Body Bias Impact in Si/SiGe Heterojunction Line TFETs: A Physical Insight
2023 · Abhishek Acharya, Anand Bulusu · IEEE International Symposium on Circuits and Systems proceedings · 4
Performance optimization of III–V homo/heterojunction line TFET: Device-circuit Interaction
2025 · Sourabh Panwar, Kummari Kesava, et al. · Solid-State Electronics · 3
Spin-orbit torque magnetic tunnel junction based on 2-D materials: Impact of bias-layer on device performance
2023 · M. Shashidhara, Shobhit Srivastava, et al. · Solid-State Electronics · 3
9T SRAM Cell for Computation-In-Memory Architectures: Proposal & Investigation
2023 · Aman Kumar Gupta, Prashant Joshi, et al. · Devices for Integrated Circuit (DevIC) · 3
Performance Analysis of III-V Hetero/Homojunction TFETs: an Analog Circuit Design Perspective
2022 · Atul Kumar Yadav, Sourabh Panwar, et al. · Silicon · 3
Investigation of III-V Tunnel FETs for Analog Circuit Design
2021 · Atul Kumar Yadav, Abhishek Acharya · Devices for Integrated Circuit (DevIC) · 3
Self-SHE Pulse-Enabled 2-D Material-Based SOT-MTJ: A Scalable and Energy-Efficient Write Circuit for LiM Architectures
2025 · M. Shashidhara, Gokul VG, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2
Spin-orbit torque MRAM performance with different materials
2025 · Piyush Tankwal, M Shashidhara, et al. · Materials Research Express · 2
Impact of S/D Extension Length and Sheet Stacking on Transient Behavior of Nanosheet FETs
2024 · Shobhit Srivastava, Sachin Doge, et al. · IEEE International Symposium on Circuits and Systems proceedings · 2
Comprehensive Investigation of Back Gate Biasing on Performance of Line TFETs
2023 · Sourabh Panwar, Shobhit Srivastava, et al. · Silicon Nanoelectronics Workshop (SNW) · 2
Works count: 44
Citation count: 262
H-index: 10
I10-index: 11
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