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Punithavathi Duraiswamy

Observed name: Duraiswamy Punithavathi
ORCID: 0000-0002-0786-3066
Observed ORCID: 0000-0002-0786-3066
OpenAlex ID: A5077548520
FPGA-GSM based gas leakage detection system
2016 · T. Arpitha, Divya Kiran, et al. · IEEE India Conference · 27
Low leakage 10T SRAM cell with improved data stability in deep sub-micron technologies
2021 · R. Krishna, Punithavathi Duraiswamy · Analog Integrated Circuits and Signal Processing · 16
Efficient implementation of 90° phase shifter in FPGA
2011 · Punithavathi Duraiswamy, Johan Bauwelinck, et al. · EURASIP Journal on Advances in Signal Processing · 14
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A Technique of Designing Low Leakage SRAM in Deep Sub-micron Technology
2020 · R Krishna, Punithavathi Duraiswamy · IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 9
30-Gb/s low power inductorless CMOS transimpedance amplifier for optical receivers
2018 · U Anusha, S Raghu, et al. · International Conference on Microwave and Photonics · 9
Single Stage Low Noise Inductor-Less TIA for RF Over Fiber Communication
2021 · Vijay Kumar, G. Sai Saravanan, et al. · IEEE Access · 7
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On the optimization of GaN Schottky Diode rectifier circuit topologies for high efficiency Wireless Power Transmission
2016 · Mohan Kumar Y.N, Punithavathi Duraiswamy · Asia-Pacific Microwave Conference (APMC) · 7
Intelligent Control of Double Boost Converter Interfaced with Multilevel Inverter for Electrical Vehicle Applications
2022 · Praveen Kumar Varanasi, S. Nagaraja Rao, et al. · Journal of The Institution of Engineers (India) Series B · 5
Virtual Sensing Active Noise Control System with 2D Microphone Array for Automotive Applications
2019 · P.S Sameer Ahamed, Punithavathi Duraiswamy · International Conference on Signal Processing and Integrated Networks (SPIN) · 5
High Gain and Low Noise Figure Single-to-Differential CMOS LNA for Ka-Band Communication System
2017 · S Raghu, Punithavathi Duraiswamy · IEEE MTT-S International Microwave and RF Conference (IMaRC) · 5
Synchronous delay based UWB pulse generator in FPGA
2012 · Punithavathi Duraiswamy, Xiao Li, et al. · IEICE Electronics Express · 5
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Simulation Study and Performance Comparison of Various SRAM Cells in 32 nm CMOS Technology
2020 · R. Krishna, Punithavathi Duraiswamy · Lecture notes in electrical engineering · 4
Evolving Embryonic Cell for Combinational Circuits using Cartesian Genetic Programming
2021 · Gayatri Malhotra, Punithavathi Duraiswamy, et al. · IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 3
A Technique of Designing Low Leakage Latch-Type Sense Amplifier in Nanometer Technology
2021 · Krishna. R, Punithavathi Duraiswamy · IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 3
Optimization of Kalman Filter for Target Tracking Applications
2020 · T. Sunil Kumar, Punithavathi Duraiswamy · Lecture notes in mechanical engineering · 3
Design and analysis of Phase Locked Loop for low power wireless applications
2016 · Akshay A., Divya Kiran, et al. · Conference on Emerging Devices and Smart Systems (ICEDSS) · 3
FPGA Accelerated Parallel HsClone GA for Digital Circuit Configuration in CGP Format
2023 · Gayatri Malhotra, Punithavathi Duraiswamy, et al. · Journal of The Institution of Engineers (India) Series B · 2
Low leakage decoder using dual-threshold technique for static random-access memory applications
2023 · R. Krishna, Punithavathi Duraiswamy · Indonesian Journal of Electrical Engineering and Computer Science · 2
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Self-repair Embryonic Architecture with GA Evolved Configuration Data
2023 · Gayatri Malhotra, Punithavathi Duraiswamy, et al. · Lecture notes in networks and systems · 2
Evolution of Configuration Data in CGP Format Using Parallel GA on Embryonic Fabric
2023 · Gayatri Malhotra, Punithavathi Duraiswamy, et al. · Lecture notes in networks and systems · 2
Compact Capacitor-Loaded Tunable Microstrip Bandpass Filter for Low-Frequency Applications
2022 · Punithavathi Duraiswamy · Journal of The Institution of Engineers (India) Series B · 2
Phase-orthogonal FIR filters: An efficient VLSI architecture for communication applications
2020 · Punithavathi Duraiswamy, Satishkumar, et al. · IEICE Electronics Express · 2
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Efficient Implementation of Low Mismatch IQ Signal Generator Based on 90° Differential Phase Shifting
2018 · G.D Satishkumar, S Raghu, et al. · IEEE India Council International Conference (INDICON) · 2
High Performance Three-Stage 30GHz CMOS Single-to-Differential LNA
2018 · S Raghu, Soumya Sunny, et al. · IEEE India Council International Conference (INDICON) · 2
GA evolved CGP configuration data for digital circuit design on embryonic architecture
2023 · Gayatri Malhotra, Punithavathi Duraiswamy · International Journal of Hybrid Intelligent Systems · 1
Works count: 47
Citation count: 146
H-index: 7
I10-index: 3
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