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WonJoon Kang
Observed names:
W.J. Kang,
Won-Joon Kang,
Wonjoon Kang
Institution:
Amkor Technology (United States)
Observed institution:
Amkor Technology (United States)
OpenAlex ID:
A5079102951
Impact of package design and materials on reliability for temperature cycling, bend, and drop loading conditions
2008
·
Ahmer Syed
, Joan Scanlan
, et al.
·
IEEE Electronic Components and Technology Conference (ECTC)
·
30
Mechanical, thermal, and electrical analysis of a compliant interconnect
2005
·
J. Galloway
, A. Syed
, et al.
·
IEEE Transactions on Components and Packaging Technologies
·
25
Board level reliability study on three-dimensional thin stacked package
2004
·
Jin-Young Kim
, Won-Joon Kang
, et al.
·
IEEE Electronic Components and Technology Conference (ECTC)
·
9
Issues in fatigue life prediction model for underfilled flip chip bump
2011
·
Nokibul Islam
, Ahmer Syed
, et al.
·
IEEE Electronic Components and Technology Conference (ECTC)
·
8
Board level reliability assessments of package on package
2007
·
Tae-Kyung Hwang
, Eun-Sook Sohn
, et al.
·
International Conference on Electronic Materials and Packaging
·
3
Board level reliability evaluation of RF PA module vias
2004
·
R. Darveaux
, Jicheng Yang
, et al.
·
IEEE/CPMT International Electronics Manufacturing Technology Symposium
·
3
Board Design, Surface Mount Assembly and Board Level Reliability Aspects of Fusionquad™ Packages
2008
·
Ahmer Syed
, Sundar Sethuraman
, et al.
·
SMTA International
·
2
Mechanical, thermal and electrical analysis of a compliant interconnect
2004
·
J. Galloway
, A. Syed
, et al.
·
I-THERM :/I-THERM - Intersociety Conference on Thermal Phenomena in Electronic Systems
·
2
Chip Board Interaction Analysis of 22-NM Fully Depeleted Silicon on Insulator (FD-SOI) Technology in Wafer Level Packaging (WLP)
2018
·
Jae Kyu Cho
, Jens Paul
, et al.
·
International Wafer Level Packaging Conference (IWLPC)
·
1
Lead Free Flip Chip Reliability for Various Package Types
2011
·
Nokibul Islam
, Miguel Jimarez
, et al.
·
ASME International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems (InterPACK)
·
1
Chip Board Interaction Analysis of 22-nm Fully Depeleted Silicon on Insulator (FD-SOI) Technology in Wafer Level Packaging (WLP)
2018
·
Jae Kyu Cho
, Jens Paul
, et al.
·
Wafer-Level Packaging Symposium
Effect of mild aging on package drop performance for lead free solders
2010
·
SeokHo Na
, SeWoong Cha
, et al.
·
IEEE CPMT Symposium Japan (ICSJ)
Effect of Mild Aging on Package Drop Performance for Lead Free
2010
·
Solders SeokHo Na
, SeWoong Cha
, et al.
Assembly and Board Level Reliability Considerations for 0.4 mm Pitch Ball Grid Array Packages
2005
·
Joan Scanlan
, Ahmer Syed
, et al.
·
SMTA International
Board Level Reliability of QFP and QFN Type Packages with Matte Sn Lead Finish
2004
·
Ahmer Syed
, Won-Joon Kang
, et al.
·
SMTA International
Board Level Assembly and Reliability Considerations for QFN Type Packages
2003
·
Ahmer Syed
, WonJoon Kang
·
SMTA International
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Works count:
16
Citation count:
84
H-index:
4
I10-index:
2
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