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Sachhidh Kannan
Observed institution:
New York University
OpenAlex ID:
A5079732524
Sneak-Path Testing of Crossbar-Based Nonvolatile Random Access Memories
2013
·
Sachhidh Kannan
, Jeyavijayan Rajendran
, et al.
·
IEEE Transactions on Nanotechnology
·
127
Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor Memories
2015
·
Sachhidh Kannan
, Naghmeh Karimi
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
94
Sneak-path Testing of Memristor-based Memories
2013
·
Sachhidh Kannan
, Jeyavijayan Rajendran
, et al.
·
International Conference on VLSI Design
·
60
Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures
2014
·
Sachhidh Kannan
, Naghmeh Karimi
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
45
Detection, diagnosis, and repair of faults in memristor-based memories
2014
·
Sachhidh Kannan
, Naghmeh Karimi
, et al.
·
IEEE VLSI Test Symposium (VTS)
·
28
Sneak path testing and fault modeling for multilevel memristor-based memories
2013
·
Sachhidh Kannan
, Ramesh Karri
, et al.
·
IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD)
·
25
3D NOC for many-core processors
2011
·
Aamir Zia
, Sachhidh Kannan
, et al.
·
Microelectronics Journal
·
17
Secure Memristor-based Main Memory
2014
·
Sachhidh Kannan
, Naghmeh Karimi
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
14
Highly-scalable 3D CLOS NOC for many-core CMPs
2010
·
Aamir Zia
, Sachhidh Kannan
, et al.
·
IEEE Interregional NEWCAS Conference (NEWCAS)
·
11
SCANN: Side Channel Analysis of Spiking Neural Networks
2023
·
Karthikeyan Nagarajan
, Rupshali Roy
, et al.
·
Cryptography
·
10
PDF
Fault Injection Attacks in Spiking Neural Networks and Countermeasures
2022
·
Karthikeyan Nagarajan
, Junde Li
, et al.
·
Frontiers in Nanotechnology
·
8
PDF
Analysis of Power-Oriented Fault Injection Attacks on Spiking Neural Networks
2022
·
Karthikeyan Nagarajan
, Junde Li
, et al.
·
Design, Automation, and Test in Europe
·
7
PDF
Engineering crossbar based emerging memory technologies
2012
·
Sachhidh Kannan
, Jeyavijayan Rajendran
, et al.
·
IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD)
·
2
A hierarchical 3-D floorplanning algorithm for many-core CMP networks
2011
·
Sachhidh Kannan
, Garrett S. Rose
·
IEEE International Symposium on Circuits and Systems proceedings
·
2
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Works count:
14
Citation count:
450
H-index:
10
I10-index:
10
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