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Author

Anisha Paul

Observed institution: Techno India University
ORCID: 0000-0002-9656-6441
Observed ORCID: 0000-0002-9656-6441
OpenAlex ID: A5079777078
CNTFET-based design of ternary logic gates with interchangeable standard positive and negative ternary output
2021 · Anisha Paul, Buddhadev Pradhan · Engineering Research Express · 16
A Novel Low-Complexity Power-Efficient Design of Standard Ternary Logic Gates using CNTFET
2023 · Anisha Paul, Buddhadev Pradhan · International Conference on Computer, Electrical & Communication Engineering (ICCECE) · 13
Novel design of power-efficient quaternary logic gates using CNTFET
2023 · Anisha Paul, Buddhadev Pradhan · International Journal of Electronics · 9
Effect of Chiral Vector on Voltage Transfer Characteristics of CNTFET Inverter
2020 · Anisha Paul, Buddhadev Pradhan · International Conference on Computer, Electrical & Communication Engineering (ICCECE) · 8
Design of Ternary and Quaternary Asynchronous Up/Down Counter using CNTFET
2024 · Anisha Paul, Buddhadev Pradhan · AEU - International Journal of Electronics and Communications · 7
Design of CNTFET-Based Ternary and Quaternary Magnitude Comparator
2023 · Anisha Paul, Buddhadev Pradhan · Circuits Systems and Signal Processing · 5
Impact of Parametric Variation on the Characteristics and Performance of CNTFET Inverter
2023 · Anisha Paul, Buddhadev Pradhan · IETE Journal of Research
Novel Mode Changing Features in the Design of Quaternary Logic Gates using CNTFET
2022 · Anisha Paul, Buddhadev Pradhan · IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)
Works count: 8
Citation count: 58
H-index: 5
I10-index: 2
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