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Pierre Bricaud
Observed names:
Bricaud, P.,
Bricaud, Pierre,
P. Bricaud,
P.J. Bricaud
Observed institutions:
Synopsys (United States),
Mentor Graphics (United States)
OpenAlex ID:
A5081333630
Reuse Methodology Manual
1999
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
171
Reuse Methodology Manual for System-on-a-Chip Designs
1998
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
144
Essential issues for IP reuse
2002
·
D.D. Gajski
, A.C.-H. Wu
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
67
Embedded tutorial
2000
·
Daniel D. Gajski
, Allen C.-H. Wu
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
45
IP reuse creation for system-on-a-chip design
2003
·
P.J. Bricaud
·
Custom Integrated Circuits Conference
·
28
Industrially Proving the SPIRIT Consortium Specifications for Design Chain Integration
2006
·
Pierre Bricaud
, Francois Remond
, et al.
·
Design, Automation, and Test in Europe
·
19
Applying the OpenMORE assessment program for IP cores
2002
·
J.-P. Gueguen
, P. Bricaud
·
International Symposium on Quality Electronic Design (ISQED)
·
6
Set top box SoC design methodology at STMicroelectronics
2003
·
F. Remond
, P. Bricaud
·
Design, Automation, and Test in Europe
·
5
Developing Hard Macros
1999
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
2
Macro Verification Guidelines
1999
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
2
Set top box SoC design methodology at STMicroelectronics
2005
·
F. Remond
, P. Bricaud
·
Design, Automation, and Test in Europe
·
1
VC rating and quality metrics: why bother? [SoC]
2003
·
P. Bricaud
·
International Symposium on Quality Electronic Design (ISQED)
·
1
System Integration with Reusable Macros
1998
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
1
Introduction
1998
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
1
Implementing a Reuse Process
1998
·
Michael Keating
, Pierre Bricaud
·
Springer eBooks
·
1
Reuse Methodology Manual, 2/E.
2021
·
Michael Keating
, Pierre Bricaud
PANEL SESSION - Who Is Closing the embedded software design gap?
2010
·
W. Ecker
, Pierre Bricaud
, et al.
·
Design, Automation, and Test in Europe
Next building block in a highly innovative SoC-ASIC-FPGA collaborative offering : CIM PACA Design Platform IP Room
2009
·
Khan, J.J.
, Dubois, M.
, et al.
·
HAL
CIM-PACA Design Platform Facilities and Examples of Realization
2009
·
Staraj, Robert
, Dubois, M.
, et al.
·
HAL
Standardized multi-level IP interconnection
2007
·
Austrate, G.
, Auguin, Michel
, et al.
·
HAL
IP day: how to choose semiconductor IP?
2003
·
P. Bricaud
·
Design, Automation, and Test in Europe
Set-top box system-on-chip design methodology
2003
·
F. Remond
, P. Bricaud
·
Electronic Systems and Software
IP Day: How to Choose Semiconductor IP?
2002
·
Pierre Bricaud
Formal verification techniques: industrial status and perspectives
2002
·
I. Moussa
, R. Pacalet
, et al.
·
Design, Automation, and Test in Europe
リユース・メソドロジ・マニュアル : システムlsi設計のための
2000
·
Michael J. Keating
, Pierre Bricaud
, et al.
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Works count:
49
Citation count:
501
H-index:
7
I10-index:
6
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