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Chaudhry Indra Kumar

Observed names: C.I. Kumar, Chaudhary Indra Kumar, Kumar Chaudhry Indra, Niraj Kumar
Observed institutions: Indian Institute of Technology Roorkee, KR Mangalam University, Debre Tabor University, Graphic Era University, Delhi Technological University, Daimler (Germany), Technical University of Denmark, Atal Bihari Vajpayee Indian Institute of Information Technology and Management
ORCID: 0000-0002-7605-3630
Observed ORCIDs: 0000-0002-7605-3630, 0009-0002-8453-2495
OpenAlex ID: A5085045684
A Highly Reliable and Energy-Efficient Triple-Node-Upset-Tolerant Latch Design
2019 · Chaudhry Indra Kumar, Bulusu Anand · IEEE Transactions on Nuclear Science · 59
A Highly Reliable and Energy Efficient Radiation Hardened 12T SRAM Cell Design
2019 · Chaudhry Indra Kumar, Bulusu Anand · IEEE Transactions on Device and Materials Reliability · 38
An Energy-Efficient High CSNR XNOR and Accumulation Scheme for BNN
2022 · Dinesh Kushwaha, Ashish Joshi, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 16
Design of highly reliable energy‐efficient SEU tolerant 10T SRAM cell
2018 · C.I. Kumar, B. Anand · Electronics Letters · 16
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High performance energy efficient radiation hardened latch for low voltage applications
2019 · Chaudhry Indra Kumar, Anand Bulusu · Integration · 11
Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications
2022 · Raghav Shekhar, Chaudhry Indra Kumar · Integration · 9
A High Performance and Low Power Subthreshold Voltage Level Shifter Design
2024 · Ananya Kapoor, Ayush Thapar, et al. · International Conference on VLSI Design · 8
High Performance CMOS Voltage Level Shifters Design for Low Voltage Applications
2023 · Ananya Kapoor, Chaitanya Shanker Jha, et al. · International Conference for Advancement in Technology (ICONAT) · 5
Highly Robust High Speed Low Power Single Node Upset Hardened Latch
2024 · Promit Mandal, Prince Kumar, et al. · IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems · 4
Design of high performance energy efficient CMOS voltage level shifter for mixed signal circuits applications
2023 · Chaudhry Indra Kumar, Abhishek Chaudhary, et al. · Integration · 4
Time-Borrowing Flip-Flop Architecture for Multi-Stage Timing Error Resilience in DVFS Processors
2021 · Avisekh Ghosh, Mohd Saif Naseem, et al. · International Conference on Intelligent Technologies (CONIT) · 4
High-performance and robust triple node upset radiation hardened latch design
2025 · Niraj Kumar, Chaudhry Indra Kumar, et al. · AEU - International Journal of Electronics and Communications · 3
An energy-efficient variation aware self-correcting latch
2018 · Chaudhry Indra Kumar, Arvind Kumar Sharma, et al. · Microelectronics Journal · 3
A novel energy-efficient self-correcting methodology employing INWE
2016 · Chaudhry Indra Kumar, Arvind Sharma, et al. · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design · 3
VM Universal Biquad Filter Using Single VDCC
2024 · Devanshu Saxena, Garima Mann, et al. · International Conference on Advancement in Electronics & Communication Engineering (AECE) · 2
A Radiation-Hardened Double Node Upset Latch Design for Nanoscale CMOS Technologies
2024 · Promit Mandal, Prince Kumar, et al. · Complexity in Engineering (COMPENG) · 2
A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches
2019 · Chaudhry Indra Kumar, Ishant Bhatia, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2
A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique
2011 · Manisha Pattanaik, Shashank Parashar, et al. · International Symposium on Electronic System Design · 2
High Performance Voltage Level Shifter Design with Single Supply
2025 · Harshit Kumar, Chaudhry Indra Kumar, et al. · International Conference on Electronics and Computing, Communication Networking Automation Technologies (ICEC2NT) · 1
High-performance radiation hardened latch using Schmitt trigger
2025 · Niraj Kumar, Chaudhary Indra Kumar, et al. · Integration · 1
An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance
2011 · Shashank Parashar, Chaudhry Indra Kumar, et al. · IEEE Computer Society Annual Symposium on VLSI · 1
A soft error resistant and highly efficient 12T SRAM cell for space applications
2026 · Lokesh Soni, Neeta Pandey, et al. · AEU - International Journal of Electronics and Communications
Electronic structure engineering of copper niobium oxide photocathodes through Zn doping for photoelectrochemical water splitting
2026 · V. Balasubramanian, B. Shunmugapriya, et al. · Ceramics International
Graphene anchored GdxCo1-xFe2O4 spinel nanocomposites with tunable redox activity for advanced supercapacitor applications
2026 · Andrey Pisarev, C. Rajeevgandhi, et al. · Ceramics International
Design of high-performance energy-efficient radiation-hardened sense amplifier for low-voltage applications
2026 · Chaudhry Indra Kumar, Rohan Pillai, et al. · Sadhana
Works count: 36
Citation count: 197
H-index: 7
I10-index: 5
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