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G. Blakiewicz

Observed names: G Blakiewicz, GRZEGORZ BLAKIEWICZ, Grzegorz Blakiewicz
ORCID: 0000-0002-0846-2782
Observed ORCID: 0000-0002-0846-2782
OpenAlex ID: A5085674258
An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
2013 · W. Jendernalik, G. Blakiewicz, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 44
A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
2016 · M. Klosowski, W. Jendernalik, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 30
Output-capacitorless low-dropout regulator using a cascoded flipped voltage follower
2011 · G. Blakiewicz · IET Circuits Devices & Systems · 29
Semi-analytical recursive algorithms for convolution calculations
1995 · W. Janke, G. Blakiewicz · IEE Proceedings - Circuits Devices and Systems · 28
A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces
2020 · Jacek Jakusz, Waldemar Jendernalik, et al. · Sensors · 19
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A 0.5 V bulk‐driven voltage follower/DC level shifter and its application in class AB output stage
2014 · Tomasz Kulej, Grzegorz Blakiewicz · International Journal of Circuit Theory and Applications · 18
CMOS realisation of analogue processor for early vision processing
2011 · W. Jendernalik, J. Jakusz, et al. · Bulletin of the Polish Academy of Sciences Technical Sciences · 18
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Frequency compensation for two-stage operational amplifiers with improved power supply rejection ratio characteristic
2010 · G. Blakiewicz · IET Circuits Devices & Systems · 12
A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
2013 · W. Jendernalik, G. Blakiewicz, et al. · Analog Integrated Circuits and Signal Processing · 11
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Analog multiplier for a low-power integrated image sensor
2009 · G. Blakiewicz · International Conference Mixed Design of Integrated Circuits and Systems · 11
Recursive Convolution Algorithms for Time-domain Simulation of Electronic Circuits
2001 · GRZEGORZ BLAKIEWICZ, WŁODZIMIERZ JANKE · Computational Methods in Science and Technology · 9
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Substrate noise modeling in early floorplanning of MS-SOCs
2005 · Grzegorz Blakiewicz, Marcin Jeske, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 8
Low-Power Receivers for Wireless Capacitive Coupling Transmission in 3-D-Integrated Massively Parallel CMOS Imager
2020 · G. Blakiewicz, M. Klosowski, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 7
Analogue CMOS ASICs in Image Processing Systems
2013 · W. Jendernalik, G. Blakiewicz, et al. · Metrology and Measurement Systems · 7
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Analog CMOS processor for early vision processing with highly reduced power consumption
2011 · Waldemar Jendernalik, Jacek Jakusz, et al. · European Conference on Circuit Theory and Design · 6
A High-Efficient Measurement System With Optimization Feature for Prototype CMOS Image Sensors
2018 · M. Klosowski, J. Jakusz, et al. · IEEE Transactions on Instrumentation and Measurement · 5
CMOS implementation of an analogue median filter for image processing in real time
2013 · W. Jendernalik, J. Jakusz, et al. · Bulletin of the Polish Academy of Sciences Technical Sciences · 5
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Estimation of supply current spectrum for early noise evaluation
2006 · G. Blakiewicz, M. Chrzanowska-Jeske · IEEE International Symposium on Circuits and Systems proceedings · 5
Substrate noise modeling in early floorplanning of MS-SOCs
2005 · G. Blakiewicz, M. Jeske, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 5
Single-Slope ADC With Embedded Convolution Filter for Global-Shutter CMOS Image Sensors
2023 · Miron Kłosowski, Yichuang Sun, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 4
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Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters
2021 · Waldemar Jendernalik, Jacek Jakusz, et al. · Electronics · 4
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Starter for Voltage Boost Converter to Harvest Thermoelectric Energy for Body-Worn Sensors
2021 · Grzegorz Blakiewicz, Jacek Jakusz, et al. · Energies · 4
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Substrate noise optimization in early floorplanning for wxed signal SOCs
2004 · G. Blakiewicz, M. Jeske, et al. · IEEE International SOC Conference (SOCC) · 4
Low-Voltage Low-Power Filters with Independent ω0 and Q Tuning for Electronic Cochlea Applications
2022 · Waldemar Jendernalik, Jacek Jakusz, et al. · Electronics · 3
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Characteristics of an Image Sensor with Early-Vision Processing Fabricated in Standard 0.35 μm Cmos Technology
2012 · Waldemar Jendernalik, Jacek Jakusz, et al. · Metrology and Measurement Systems · 3
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Works count: 50
Citation count: 322
H-index: 10
I10-index: 10
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