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Shashidhar Tantry

Observed names: Dr. Shashidhar Tantry, S. Tantry, Tantry, Dr. Shashidhar
Institution: PES University
ORCID: 0000-0002-3747-1709
Observed ORCID: 0000-0002-3747-1709
OpenAlex ID: A5086584545
Analysis of various Approximate adders in Ripple Carry Adder design.
2023 · R.V Nithyashree, S Afreen, et al. · IEEE Global Conference for Advancement in Technology (GCAT) · 24
Electronic notice board with multiple output display
2016 · Kruthika Simha, Shreya, et al. · International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES) · 16
Two floating resistor circuits and their applications to synaptic weights in analog neural networks
2002 · S. Tantry, T. Yoneyama, et al. · IEEE International Symposium on Circuits and Systems proceedings · 12
A threshold voltage independent floating resistor circuit exhibiting both positive and negative resistance values
2003 · T. Oura, T. Yoneyama, et al. · IEEE International Symposium on Circuits and Systems proceedings · 10
A low voltage floating resistor having positive and negative resistance values
2003 · S. Tantry, T. Oura, et al. · IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) · 8
A CMOS Floating Resistor Circuit Having Both Positive and Negative Resistance Values
2002 · Takao Oura, T. Yoneyama, et al. · IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences · 8
DDR Controller with Optimized Delay and Access Time
2022 · Sr Gagan, M Harshith, et al. · International Conference on Futuristic Technologies (INCOFT) · 7
A Capacitive sensor readout circuit with low power mode and variable gain operations
2017 · Rohan Srinath, G. N. Prasannapatil, et al. · International Conference on Microelectronic Devices, Circuits and Systems (ICMDCS) · 7
Design and Implementation of Low Noise Amplifier and Variable Gain Amplifier for ECG Systems
2022 · Shreelekha Panchal, Shruthi I. T, et al. · IEEE International Conference for Convergence in Technology (I2CT) · 6
A Low voltage floating resistor circuit having both positive and negative resistance values
2003 · Shashidhar Tantry, Yasuyuki Hiraku, et al. · IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences · 6
A High Gain, Low Power Operational Amplifier utilizing BiCMOS Class AB Output Stage
2021 · I.T Shruthi, Shreelekha Panchal, et al. · IEEE Global Conference for Advancement in Technology (GCAT) · 5
A high efficiency, fast response buck converter for low voltage applications
2019 · M S Sunita, B S Rakshitha, et al. · IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) · 3
Implementation of DC Motor Speed Control Logic on FPGA
2018 · Dhanashree Bhate, Shashidhar Tantry, et al. · IEEE International Conference for Convergence in Technology (I2CT) · 3
Analysis of Different Generations of Current Conveyors Using CMOS and Its Simulation
2021 · N Vanaja, Shashidhar Tantry · International Conference on Intelligent Technologies (CONIT) · 2
Design and Implementation of Array Multiplier Using 2-Bit Accurate and Approximate Adder
2024 · R.V Nithyashree, V. Yoga Priya, et al. · IEEE PhD Colloquium on Emerging Domain Innovation and Technology for Society (PhD EDITS) · 1
Detecting Malfunction of Bias Current for Operational Amplifiers
2022 · Terin Nisha D’ Souza, Shruti Venkatesh, et al. · International Conference on Futuristic Technologies (INCOFT) · 1
Analog Front-End Modelling of Miniature CMOS Image Sensors
2022 · Rajath J, Darshan H M, et al. · IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 1
Analysis of Switched Capacitor Buck Converter using Sampling Frequency Control Method
2021 · Sunita M S, Dhanush Abhinand R B, et al. · IEEE Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON) · 1
Adaptive ON - Time Boost Converter in 45nm for Solar Cell Applications
2021 · Sunita M S, Tejas Somashekhar, et al. · International SoC Design Conference · 1
An Unified EKV MOSFET Model to Achieve Better Performance of Practical MOS Circuits Using Verilog-A
2019 · Shashidhar Tantry, B H Sagar, et al. · IEEE Global Conference for Advancement in Technology (GCAT) · 1
Positive and negative floating resistor with control voltage on high impedance terminals
2017 · Sharanu Devakki, Shashidhar Tantry · International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS) · 1
AI-Assisted Design and Implementation of an Analog EEG Sensor Using a Shared CMOS Operational Amplifier Core
2026 · Rohil S, Aditya Jayashankar, et al. · International Conference on Intelligent Technologies (CONIT)
Design and Analysis of a Power and Delay Optimized Radix -4 Approximate Subtractor
2026 · Nithyashree R V, Shashidhar Tantry · International journal of research and scientific innovation
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Design of a Low Phase Noise Quadrature DCO Using Dual Superharmonic Injection in 55nm CMOS for Ka-Band Applications
2025 · Devesh Bhaskaran, Shashidhar Tantry · IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
A Poly-Resistor Based Temperature Sensing Chip with Digital Output
2025 · Prof. Lokesh L, Dr. Shashidhar Tantry, et al. · Indian Journal of VLSI Design
Works count: 41
Citation count: 124
H-index: 7
I10-index: 4
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