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Claudio Contiero

Observed name: C. Contiero
OpenAlex ID: A5087199504
A new integrated silicon gate technology combining bipolar linear, CMOS logic, and DMOS power parts
1986 · A. Andreini, C. Contiero, et al. · IEEE Transactions on Electron Devices · 107
BCD8 from 7V to 70V: a new 0.l8μm Technology Platform to Address the Evolution of Applications towards Smart Power ICs with High Logic Contents
2007 · D. Riccardi, A. Causio, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 73
LDMOS implementation in a 0.35 μm BCD technology (BCD6)
2002 · A. Moscatelli, A. Merlini, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 61
Smart power approaches VLSI complexity
2002 · C. Contiero, P. Galbiati, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 47
Roadmap Differentiation and Emerging Trends in BCD Technology
2002 · C. Contiero, A. Andreini, et al. · European Solid-State Device Research Conference · 45
Hot-carrier reliability in submicrometer LDMOS transistors
2002 · R. Versari, A. Pieracci, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 44
Hot-electron-induced degradation in high-voltage submicron DMOS transistors
2002 · S. Manzini, C. Contiero · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 43
Smart power technologies evolution
2002 · B. Murari, C. Contiero, et al. · IEEE Industry Applications Society Annual Meeting (IAS) · 39
ESD robustness of smart-power protection structures evaluated by means of HBM and TLP tests
2002 · G. Meneghesso, S. Santirosi, et al. · IEEE International Reliability Physics Symposium proceedings · 24
Characteristics and applications of a 0.6 μm bipolar-CMOS-DMOS technology combining VLSI non-volatile memories
2002 · C. Contiero, P. Galbiati, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 21
LDMOS implementation by large tilt implant in 0.6 μm BCD5 process, flash memory compatible
2002 · C. Contiero, P. Galbiati, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 21
Hot-electron injection and trapping in the gate oxide of submicron DMOS transistors
2002 · S. Manzini, A. Gallerano, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 16
0.18 μm BCD -High Voltage Gate (HVG) Process to address Advanced Display Drivers Roadmap
2005 · M. Annese, S. Bertaiola, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 15
High doped drain double-Resurf 100V P-channel MOS on SOI 0.35 ¿m BCD technology
2008 · Vincenzo Palumbo, Mirko Venturato, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 14
ESD protection structures for BCD5 smart power technologies
2001 · L. Sponton, L. Cerati, et al. · Microelectronics Reliability · 14
Overstress and electrostatic discharge in CMOS and BCD integrated circuits
2000 · G. Meneghesso, M. Ciappa, et al. · Microelectronics Reliability · 13
BCD Technologies for VLSI Smart Power ICs
1995 · C. Contiero · European Solid-State Device Research Conference · 11
Extraction of channel doping profile in DMOS transistors
2002 · A. Pieracci, M. Lanzoni, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 10
Design of a high side driver in multipower-BCD and VIPower technologies
1987 · C. Contiero, A. Andreini, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 10
A 12V Complementary RF LDMOS Technology Developed on a 0.18pm CMOS Platform
2004 · Alessandro Moscatelli, C. Contiero, et al. · 8
Sub-millisecond energy handling capability improvement of IC power devices with thick copper metallization
2004 · F. Alagi, L. Labate, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 8
Automatic 2-D and 3-D simulation of parasitic structures in smart-power integrated circuits
2002 · E. Gnani, V. Giudicissi, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 8
Trends and Issues in BCD Smart Power Technologies
1999 · C. Contiero, P. Galbiati, et al. · European Solid-State Device Research Conference · 6
20V-40V Symmetrical Vertical Trench nMOS (SVT MOS) design for display driver ICs
2006 · M. Annese, P. Montanini, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 5
BCD Technology for Smart Power ICs
2002 · A. Andreini, C. Contiero, et al. · Springer eBooks · 4
Works count: 29
Citation count: 675
H-index: 14
I10-index: 19
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