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Author

Lukáš Sommer

Observed names: Lukas Sommer, Sommer, Lukas
ORCID: 0000-0003-1918-3911
Observed ORCID: 0000-0003-1918-3911
OpenAlex ID: A5090242105
OpenMP device offloading to FPGA accelerators
2017 · Lukas Sommer, Jens Korinth, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 59
The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems
2021 · Carsten Heinz, Jaco Hofmann, et al. · Journal of Signal Processing Systems · 44
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Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators
2018 · Lukas Sommer, Julian Oppermann, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 26
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs
2020 · Lukas Sommer, Lukas Weber, et al. · IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) · 24
Exact and Practical Modulo Scheduling for High-Level Synthesis
2019 · Julian Oppermann, Melanie Reuter-Oppermann, et al. · ACM Transactions on Reconfigurable Technology and Systems · 13
OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure
2020 · Jens Huthmann, Lukas Sommer, et al. · Lecture notes in computer science · 12
User-driven Online Kernel Fusion for SYCL
2022 · Víctor Pérez, Lukas Sommer, et al. · ACM Transactions on Architecture and Code Optimization · 11
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Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs
2019 · Lukas Weber, Lukas Sommer, et al. · International Conference on Field-Programmable Technology (FPT) · 10
Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design
2020 · Carsten Heinz, Jaco A. Hofmann, et al. · International Workshop on Runtime and Operating Systems for Supercomputers · 9
Experiences Building an MLIR-Based SYCL Compiler
2024 · Ettore Tiotto, Víctor Pérez, et al. · Proceedings of the CGO/Proceedings of the ... CGO · 7
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High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud
2019 · Micha Ober, Jaco Hofmann, et al. · IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC) · 7
DAPHNE - An automotive benchmark suite for parallel programming models on embedded heterogeneous platforms
2019 · Lukas Sommer, Florian Stock, et al. · 7
Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application
2021 · Marco Hartmann, Lukas Weber, et al. · IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC) · 6
Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study
2020 · Lukas Sommer, Florian Stock, et al. · Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP) · 6
SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis
2019 · Julian Oppermann, Lukas Sommer, et al. · International Conference on Field-Programmable Technology (FPT) · 6
A Framework for the Automatic Generation of FPGA-based Near-Data Processing Accelerators in Smart Storage Systems
2021 · Lukas Weber, Lukas Sommer, et al. · IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 5
Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis
2018 · Julian Oppermann, Melanie Reuter-Oppermann, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 5
SPNC: An Open-Source MLIR-Based Compiler for Fast Sum-Product Network Inference on CPUs and GPUs
2022 · Lukas Sommer, Cristian Axenie, et al. · Proceedings of the CGO/Proceedings of the ... CGO · 4
Synthesis of interleaved multithreaded accelerators from OpenMP loops
2017 · Lukas Sommer, Julian Oppermann, et al. · International Conference on ReConFigurable Computing and FPGAs (ReConFig) · 4
Exploiting High-Bandwidth Memory for FPGA-Acceleration of Inference on Sum-Product Networks
2022 · Lukas Weber, Johannes Wirth, et al. · IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 3
Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs
2022 · Hanna Kruppe, Lukas Sommer, et al. · Lecture notes in computer science · 3
Programming Model Extensions for General-Purpose Processing-In-Memory
2024 · Hyesun Hong, Lukas Sommer, et al. · ISC High Performance (ISC) · 2
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OpenMP Device Offloading for Embedded Heterogeneous Platforms - Work-in-Progress
2020 · Lukas Sommer, Andreas Koch · ACM International Conference on Embedded Software (EMSOFT) · 2
SPNC: Accelerating Sum-Product Network Inference on CPUs and GPUs
2021 · Lukas Sommer, Michael Halkenhauser, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 1
Programming Heterogeneous Systems with General and Domain-Specific Frameworks
2021 · Sommer, Lukas · Technischen Universität Darmstadt · 1
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Works count: 35
Citation count: 279
H-index: 9
I10-index: 8
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