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Ayush Dahiya
Institution:
Delhi Technological University
Observed institution:
Delhi Technological University
ORCID:
0000-0002-5196-231X
Observed ORCID:
0000-0002-5196-231X
OpenAlex ID:
A5097794458
Modified Decoupled Sense Amplifier with Improved Sensing Speed for Low-Voltage Differential SRAM
2023
·
Ayush Dahiya
, Poornima Mittal
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
8
PDF
A low-power single ended half-select free 7 T SRAM cell with improved write margin at 32 nm technology node
2024
·
Arunima Tripathi
, Ayush Dahiya
, et al.
·
Physica Scripta
·
6
Variation-Tolerant Sense Amplifier Using Decoupling Transistors for Enhanced SRAM Read Performance
2023
·
Ayush Dahiya
, Poornima Mittal
, et al.
·
Circuits Systems and Signal Processing
·
6
A low-power half-select free 8T SRAM cell with process-induced variation resistance for voltage scaling at 32 nm technology node
2025
·
Ayush Dahiya
, Poornima Mittal
, et al.
·
Integration
·
4
A Variation Tolerant Write Assist Read Decoupled 9T SRAM Cell for Low Voltage Application
2025
·
Ayush Dahiya
, Vansh Singhal
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
3
PDF
Realizing In-Memory Computing using Reliable Differential 8T SRAM for Improved Latency
2024
·
Ayush Dahiya
, Poornima Mittal
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
3
Design Trade-Offs in 8T SRAM Architectures: Differential and Single-Ended Approaches
2026
·
Ayush Dahiya
, Poornima Mittal
, et al.
·
Lecture notes in networks and systems
A Low Power Single Ended and Dual Port 8T SRAM with Robust Features
2024
·
Ayush Dahiya
, Arunima Tripathi
, et al.
·
Lecture notes in electrical engineering
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Works count:
8
Citation count:
30
H-index:
4
I10-index:
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