Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Yuan Yao
Institution:
PLA Academy of Military Science
Observed institutions:
Harvard University,
Nankai University,
PLA Academy of Military Science,
System Equipment (China),
China Agricultural University,
Zhejiang University
show all 6
ORCID:
0000-0001-7479-9263
Observed ORCID:
0000-0001-7479-9263
OpenAlex ID:
A5101953376
Measuring plant growth characteristics using smartphone based image analysis technique in controlled environment agriculture
2019
·
Cheng Li
, Ranjeeta Adhikari
, et al.
·
Computers and Electronics in Agriculture
·
73
YOLO Acceleration using FPGA Architecture
2018
·
Guangju Wei
, Yanzhao Hou
, et al.
·
IEEE/CIC International Conference on Communications in China (ICCC)
·
20
SelectDirectory: a selective directory for cache coherence in many-core architectures
2015
·
Yuan Yao
, Guanhua Wang
, et al.
·
11
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators
2022
·
Iulian Brumar
, Georgios Zacharopoulos
, et al.
·
ACM Transactions on Embedded Computing Systems
·
10
PDF
Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures
2016
·
Yuan Yao
, Guanhua Wang
, et al.
·
International Conference on Supercomputing
·
10
Determining Optimal Coherency Interface for Many-Accelerator SoCs Using Bayesian Optimization
2019
·
Kshitij Bhardwaj
, Marton Havasi
, et al.
·
IEEE Computer Architecture Letters
·
9
A comprehensive methodology to determine optimal coherence interfaces for many-accelerator SoCs
2020
·
Kshitij Bhardwaj
, Marton Havasi
, et al.
·
International Symposium on Low Power Electronics and Design (ISLPED)
·
7
FPGA based hardware-software co-designed dynamic binary translation system
2013
·
Yuan Yao
, Zhongyong Lu
, et al.
·
International Conference on Field Programmable Logic and Applications (FPL)
·
6
TC-Release++: An Efficient Timestamp-Based Coherence Protocol for Many-Core Architectures
2017
·
Yuan Yao
, Wenzhi Chen
, et al.
·
IEEE Transactions on Parallel and Distributed Systems
·
4
Design of improved error-rate sliding window decoder for SC-LDPC codes: reliable termination and channel value reuse
2025
·
Xishan Jia
, Jining Li
, et al.
·
Optoelectronics Letters
·
2
A Technology Based Benefit Analysis on Reuse of Vector Register for SIMD Vectorization Optimization
2010
·
Ming Yang
, Yuan Yao
, et al.
·
International Symposium on Information Science and Engineering
·
1
Slurry Carbon–Driven Pore Evolution, Infiltration, and Mechanical Properties of Continuous Carbon Fiber‐Reinforced Silicon Carbide Composites Prepared by Slurry Impregnation Combined With Reaction Melt Infiltration
2026
·
Jianzhao Shang
, Jiahe Zeng
, et al.
·
Journal of the American Ceramic Society
PDF
Infiltration Behavior and Pore Evolution of C f /SiC Composites Prepared by SI–RMI: Influence of Slurry Solid Loading
2026
·
Jianzhao Shang
, Jiahe Zeng
, et al.
·
Journal of the American Ceramic Society
Extending Explicit Management of SMMHS to OpenMP for Heterogeneous Architectures
2013
·
Xiaoxian Liu
, Rongcai Zhao
, et al.
·
Lecture notes in electrical engineering
Data reuse in sliding window operations base on storing block targeted hardware compilation
2010
·
Taogang Liu
, Rongcai Zhao
, et al.
·
International Conference on Future Computer and Communication
Show more works
View as search
Works count:
15
Citation count:
153
H-index:
7
I10-index:
5
Year
Topic
Type