Author

Yu Liu

Institution: Toshiba (United States)

Observed institution: Toshiba (United States)

ORCID: 0000-0001-7724-7368

Observed ORCID: 0000-0001-7724-7368

OpenAlex ID: A5102913577

A Simplified DC Capacitor Active Voltage-Balance Algorithm with Common-Mode Voltage Reduction using Active-Zero SVPWM for Three-Level Photovoltaic Grid-Tie Inverter Application

2020 · Da Jiao, Yu Liu, et al. · IEEE Texas Power and Energy Conference (TPEC) · 1

Thyristor Composed of a Singlechip Zeropassage Trigger Capacity Control Circuit

2000 · Yu Liu · Shandong Electronics

Works count: 2

Citation count: 1

H-index: 1

I10-index: