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S. Y. Hou

Observed names: S. Y Hou, S.Y. Hou
ORCID: 0009-0006-8848-9833
Observed ORCID: 0009-0006-8848-9833
OpenAlex ID: A5103203400
Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology
2017 · S. Y. Hou, W. Chris Chen, et al. · IEEE Transactions on Electron Devices · 234
CoWoS Architecture Evolution for Next Generation HPC on 2.5D System in Package
2023 · Yu-Chen Hu, Yu-Min Liang, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 112
Wafer Level System Integration of the Fifth Generation CoWoS®-S with High Performance Si Interposer at 2500 mm2
2021 · P. K. Huang, C. Y. Lu, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 111
High density 3D integration using CMOS foundry technologies for 28 nm node and beyond
2010 · J.C. Lin, W.C. Chiou, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 70
Integrated Deep Trench Capacitor in Si Interposer for CoWoS Heterogeneous Integration
2019 · S.Y. Hou, H. Hsia, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 68
A 0.13 μm CMOS technology with 193 nm lithography and Cu/low-k for high performance applications
2002 · K.K. Young, S.Y. Wu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 51
Design and Analysis of Logic-HBM2E Power Delivery System on CoWoS ® Platform with Deep Trench Capacitor
2020 · W. T. Chen, C. C. Lin, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 33
Supercarrier Redistribution Layers to Realize Ultra Large 2.5D Wafer Scale Packaging by CoWoS
2023 · S. Y. Hou, Chien Hsun Lee, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 30
Wafer level integration of an advanced logic-memory system through 2nd generation CoWoS® technology
2017 · W. Chris Chen, Clark Hu, et al. · Symposium on VLSI Technology · 28
Optical and Electrical Characterization of a Compact Universal Photonic Engine
2025 · M. F. Chen, H. T. Cheng, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 25
A manufacturable interposer MIM decoupling capacitor with robust thin high-K dielectric for heterogeneous 3D IC CoWoS wafer level system integration
2014 · W.S. Liao, C.H. Chang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 24
Electromigration study of micro bumps at Si/Si interface in 3DIC package for 28nm technology and beyond
2011 · T. H. Lin, R. D. Wang, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 18
An ultra-thin interposer utilizing 3D TSV technology
2012 · W.C. Chiou, K.F. Yang, et al. · Symposium on VLSI Technology · 16
Thinning, stacking, and TSV proximity effects for Poly and High-K/Metal Gate CMOS devices in an advanced 3D integration process
2012 · T. Lo, M. F. Chen, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 15
3D IC heterogeneous integration of GPS RF receiver, baseband, and DRAM on CoWoS with system BIST solution
2013 · W.S. Liao, H. N. Chen, et al. · Symposium on VLSI Circuits · 14
High-performance inductors for integrated fan-out wafer level packaging (InFO-WLP)
2013 · S. M. Chen, Lei Huang, et al. · 12
Orthotropic stress field induced by TSV and its impact on device performance
2011 · C. C. Hsieh, H. A. Teng, et al. · IEEE International Interconnect Technology Conference (IITC) · 12
A high-performance low-cost chip-on-Wafer package with sub-μm pitch Cu RDL
2014 · W.S. Liao, C.C. Chiang, et al. · Symposium on VLSI Technology · 11
Yield and reliability of 3DIC technology for advanced 28nm node and beyond
2011 · K.F. Yang, Ting Wu, et al. · Symposium on VLSI Technology · 10
Lead-free flip chip solution for 40 nm extreme low-k interconnect system
2010 · S.Y. Hou, C.W. Shih, et al. · IEEE International Interconnect Technology Conference (IITC) · 4
Manufacturability optimization and design validation studies for FPGA-based, 3D integrated circuits
2013 · D. E. Ibbotson, Arif Rahman, et al. · Symposium on VLSI Technology · 3
A flexible top metal structure to improve ultra low-k reliability
2015 · K. F. Cheng, C. L. Teng, et al. · IEEE International Interconnect Technology Conference and IEEE Materials for Advanced Metallization Conference (IITC/MAM)
Superconducting flux flow devices, digital circuits and memories
1993 · J. Martens, M.E. Johansson, et al. · University of North Texas Digital Library (University of North Texas)
Works count: 23
Citation count: 901
H-index: 14
I10-index: 19
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