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Dinesh Sharma

Observed names: Dinesh K. Sharma, Sharma, Dinesh K.
ORCID: 0009-0005-9249-6465
Observed ORCID: 0009-0005-9249-6465
OpenAlex ID: A5103490672
A Variation Tolerant Current-Mode Signaling Scheme for On-Chip Interconnects
2012 · Marshnil Dave, Mahavir Jain, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 45
Reasoning about synchronization in GALS systems
2006 · Supratik Chakraborty, Joycee Mekie, et al. · Formal Methods in System Design · 3
A Wideband Low Power VCO for IEEE 802.11a
2006 · Ankur Anchlia, Dinesh Sharma · IEEE International Conference on Solid-State and Integrated Circuit Technology · 3
Testable Design of Repeaterless Low Swing On-Chip Interconnect
2015 · Kadayinti, Naveen, Sharma, Dinesh K. · arXiv (Cornell University) · 2
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A novel robust signaling scheme for high-speed low-power communication over long wires
2012 · Marshnil Dave, Maryam Shojaei Baghini, et al. · International Symposium on Quality Electronic Design (ISQED) · 1
A fully on-chip throughput measurement system for multi-gigabits/s on-chip interconnects
2011 · Amit J. Vishnani, Marshnil V. Dave, et al. · Asia Symposium on Quality Electronic Design · 1
Settling Time of Mesochronous Clock Retiming Circuits for Low Swing Interconnects.
2016 · Naveen Kadayinti, Amitalok J. Budkuley, et al. · arXiv (Cornell University)
Works count: 8
Citation count: 55
H-index: 3
I10-index: 1
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