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Edward Joseph Nowak

Observed names: Edward J. Nowak, Edward Nowak
OpenAlex ID: A5103564728
Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures
2019 · Ali Razavieh, Peter Zeitzoff, et al. · IEEE Transactions on Nanotechnology · 292
High Speed CMOS Design Styles
1999 · Kerry Bernstein, Keith M. Carrig, et al. · Springer eBooks · 195
Crystallographic-Orientation-Dependent Gate-Induced Drain Leakage in Nanoscale MOSFETs
2010 · Rajan K. Pandey, Kota V. R. M. Murali, et al. · IEEE Transactions on Electron Devices · 30
A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology
2007 · Rajiv Joshi, Keunwoo Kim, et al. · International Conference on VLSI Design · 29
Self-Consistent and Efficient Electro-Thermal Analysis for Poly/Metal Gate FinFETs
2006 · Satish Kumar, Rajiv V. Joshi, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 21
Channel electron mobility dependence on lateral electric field in field-effect transistors
2000 · Dennis Hoyniak, Edward Nowak, et al. · Journal of Applied Physics · 20
RF-pFET in fully depleted SOI demonstrates 420 GHz FT
2017 · Josef Watts, Kumaran Sundaram, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 12
Improved effective switching current (IEFF+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation
2008 · Xiaojun Yu, Shu-jen Han, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 11
45 nm SOI and Beyond - Getting to a General Purpose Technology
2007 · Subramanian S. Iyer, Edward J. Nowak · IEEE International SOI Conference (SOI) · 11
Modeling and Characterization of Gate Leakage in High-K Metal Gate Technology-Based Embedded DRAM
2013 · Mohit Bajaj, Rajan K. Pandey, et al. · IEEE Transactions on Electron Devices · 9
Performance, Reliability, and Supply Voltage Reduction, with the Addition of Temperature as a Design Variable
1993 · Daniel Foty, Edward J. Nowak · European Solid-State Device Research Conference · 7
(Invited) Advanced CMOS Scaling and FinFET Technology
2013 · Edward Joseph Nowak · ECS Transactions · 6
Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges
2008 · Jung-Suk Goo, Richard Q. Williams, et al. · Custom Integrated Circuits Conference · 5
Advanced CMOS Scaling and FinFET Technology
2012 · Edward J. Nowak · ECS Meeting Abstracts · 3
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Low Power FDSOI Technology and Devices for RF Applications
2016 · Christoph Schwan, Kok Wai Chew, et al. · ECS Transactions · 2
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Process Variability
1999 · Kerry Bernstein, Keith M. Carrig, et al. · Springer eBooks · 2
Impact of intra-die thermal variation on accurate MOSFET gate-length measurement
2009 · Ishtiaq Ahsan, Dieter K. Schroder, et al. · ASMC proceedings · 1
Circuit Design Margin and Design Variability
1999 · Kerry Bernstein, Keith M. Carrig, et al. · Springer eBooks · 1
A Novel Technique for Probing the Vertical Component of FinFET Source Resistance
2021 · Peng Wang, Mickey Yu, et al. · IEEE Transactions on Electron Devices
A Retrospective View on the Technology Evolution to Support Low Power Mobile Application
2018 · Bipul C. Paul, Ajey P. Jacob, et al. · Journal of Low Power Electronics
Low Power FDSOI Technology and Devices for RF Applications
2016 · Christoph Schwan, Kok Wai Chew, et al. · ECS Meeting Abstracts
(Invited) Revisiting the Impact on Sub-Threshold Regions in Uniaxially-Strained FETs
2013 · Myung-Hee Na, Kevin McStay, et al. · ECS Transactions
Dual workfunction metal-gate FinFET devices fabricated using total gate silicidation
2003 · Jakub Kedzierski, Edward Nowak, et al. · International Conference on Solid State Devices and Materials (SSDM)
Clocked Logic Styles
1999 · Kerry Bernstein, Keith M. Carrig, et al. · Springer eBooks
Non-Clocked Logic Styles
1999 · Kerry Bernstein, Keith M. Carrig, et al. · Springer eBooks
Works count: 32
Citation count: 657
H-index: 9
I10-index: 9
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