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Ping‐Ying Wang

Observed names: Ping-Ying Wang, Ping-ying Wang
OpenAlex ID: A5109083092
15.3 A 2.4GHz ADPLL with digital-regulated supply-noise-insensitive and temperature-self-compensated ring DCO
2014 · Yi-Chieh Huang, Che-Fu Liang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 79
A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes
2009 · Ping-Ying Wang, Jing-Hong Conan Zhan, et al. · IEEE Journal of Solid-State Circuits · 60
A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE
2008 · Hsiang-Hui Chang, Ping-Ying Wang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 47
An All-Digital Jitter Tolerance Measurement Technique for CDR Circuits
2012 · Yi-Chieh Huang, Ping-Ying Wang, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 25
10.8 A wideband fractional-N ring PLL using a near-ground pre-distorted switched-capacitor loop filter
2015 · Che-Fu Liang, Ping-Ying Wang · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 20
A direct digital frequency modulation PLL with all digital on-line self-calibration for quad-band GSM/GPRS transmitter
2009 · Chi-Hsueh Wang, Ping‐Ying Wang, et al. · Symposium on VLSI Circuits · 15
Spread spectrum clock generator
2007 · Ping-Ying Wang, Shang-Ping Chen · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 12
An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability
2008 · Ping-Ying Wang, Jing-Hong Conan Zhan, et al. · Custom Integrated Circuits Conference · 10
An all-digital built-in self-test technique for transfer function characterization of RF PLLs
2011 · Ping-Ying Wang, Hsiu-Ming Chang, et al. · Design, Automation, and Test in Europe · 9
A fractional spur reduction technique for RF TDC-based all digital PLLs
2008 · Ping-Ying Wang, Hsiang-Hui Chang, et al. · European Solid-State Circuits Conference (ESSCIRC) · 7
A digital calibration enhanced GSM/GPRS transmitter
2011 · Ping-Ying Wang, Ching-Hsing Wang, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 5
A charge pump-based direct frequency modulator
2008 · Ping-Ying Wang, Hsiu-Ming Chang · IEEE International Symposium on Circuits and Systems proceedings · 5
All digital modulation bandwidth extension technique for narrow bandwidth analog fractional-N PLL
2010 · Ping-Ying Wang, Chia-Huang Fu · European Solid-State Circuits Conference (ESSCIRC) · 4
Chaos In Phase Locked Loop
2006 · Ping-ying Wang · International Symposium on VLSI Design, Automation and Test · 4
0.0234mm2/1mW DCO Based Clock/Data Recovery for Gbit/s Applications
2007 · Kuan-Hua Chao, Ping-Ying Wang, et al. · Symposium on VLSI Circuits · 3
Timing Orthogonal Capacitance Multiplication Technique for PLL
2007 · Ping-Ying Wang, Shang-Ping Chen, et al. · Symposium on VLSI Circuits · 3
A Phase Locked Loop with a Mixed Mode Loop Filter for Clock/Data Recovery in Optical Disc Drives
2005 · Ping-Ying Wang, Hsiang Ji Hsieh, et al. · IEEE International Symposium on Circuits and Systems proceedings · 3
A transfer-curve-folded DCO in 0.13μm CMOS
2008 · Jing-Hong Conan Zhan, Hsiang-Hui Chang, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 2
Time amplified charge pump PLL
2020 · Ping-Ying Wang · Institution of Engineering and Technology eBooks
A 1V fractional-N PLL with nonlinearity-insensitive modulator
2015 · Yi-Chieh Huang, Che-Fu Liang, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC)
Impairment‐Aware Analog Circuit Design by Reconfiguring Feedback Systems
2012 · Ping‐Ying Wang · Wiley eBooks
ATransfer-Curve-Folded DCO in 0.13P mC MOS
2008 · Jing-Hong Conan Zhan, Hsiang-Hui Chang, et al.
Chaos in delay locked loop
2006 · Ping-Ying Wang, C.-H. Chou, et al. · IEEE International Symposium on Circuits and Systems proceedings
ChaosInPhase Locked Loop
2006 · Ping‐Ying Wang
A CMOS multi-format read/write soc for 7x blu-ray/16x DVD/56|CD
2005 · Jyh-Shin Pan, Pi-Hai Liu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
Works count: 25
Citation count: 313
H-index: 9
I10-index: 8
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