Author

C. Dike

Observed name: Charles Dike

Institutions: China University of Petroleum, East China, The University of Osaka

Observed institutions: Intel (United States), China University of Petroleum, East China, The University of Osaka

OpenAlex ID: A5110263222

Miller and noise effects in a synchronizing flip-flop

1999 · C. Dike, E. Burton · IEEE Journal of Solid-State Circuits · 120

An asynchronous instruction length decoder

2001 · K.S. Stevens, S. Rotem, et al. · IEEE Journal of Solid-State Circuits · 78

RAPPID: an asynchronous instruction length decoder

2003 · S. Rotem, K. Stevens, et al. · Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems · 75

A 900 Mb/s bidirectional signaling scheme

1995 · R. Mooney, C. Dike, et al. · IEEE Journal of Solid-State Circuits · 53

A fast resolving BiNMOS synchronizer for parallel processor interconnect

1995 · J. Jex, C. Dike · IEEE Journal of Solid-State Circuits · 25

Intel's digital random number generator (DRNG)

2011 · George Cox, Charles Dike, et al. · IEEE Hot Chips Symposium · 15

FA 18.4: a phase-tolerant 3.8 GB/s data-communication router for a multiprocessor supercomputer backplane

2002 · E.A. Reese, H. Wilson, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 15

A 900 Mb/s bidirectional signaling scheme

2002 · R. Mooney, C. Dike, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7

An active 90nm inductive signal noise testchip with realistic microprocessor signal buses

2006 · M. Elzinga, E. Chiprout, et al. · IEEE International Conference on IC Design and Technology (ICICDT) · 1

Works count: 10

Citation count: 389

H-index: 7

I10-index: 7