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Author

Liang-Ying Su

Observed institution: Chung Yuan Christian University
ORCID: 0009-0003-8233-939X
Observed ORCID: 0009-0003-8233-939X
OpenAlex ID: A5111189493
Highly Fault-Tolerant Systolic-Array-Based Matrix Multiplication
2024 · Hsin-Chen Lu, Liang-Ying Su, et al. · Electronics · 2
A Neural Network Compiler for Efficient Data Storage Optimization in ReRAM-Based DNN Accelerators
2025 · Hsu-Yu Kao, Liang-Ying Su, et al. · Electronics · 1
A Metal-Only ECO Algorithm for Improving Hardware Security with Gate Camouflaging
2023 · Liang-Ying Su, Shih-Hsu Huang · 1
Temperature-Conscious Test Scheduling Strategies for 3D Integrated Circuits
2026 · Hsiu-Wei Chen, Sz-Chi Ting, et al. · Electronics
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Multi-Trojan Aware Routing with Dynamic Shielding for Secure Network-on-Chip
2026 · Po-Wen Lu, Liang-Ying Su, et al. · IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan)
Spare-Row-Based Fault-Tolerant Dynamic Operation Units for RRAM Computing-in-Memory Systems
2026 · Liang-Ying Su, Zih-Yu Huang, et al. · Micromachines
An Approximate Method for The Fault Tolerance of SRAM-Based Near-Memory Multiply-Accumulate Units
2024 · Yung-Chieh Lin, Liang-Ying Su, et al. · International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
Design Flow for Incorporating Camouflaged Logic Gates to Enhance Hardware Security While Considering Timing Closure
2024 · Liang-Ying Su, Shih-Hsu Huang · IEEE International Symposium on Circuits and Systems proceedings
Works count: 8
Citation count: 4
H-index: 1
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