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Zhengyuan Shi

Observed name: Shi, Zhengyuan
Observed institution: Chinese University of Hong Kong
ORCID: 0000-0002-2186-9579
Observed ORCID: 0000-0002-2186-9579
OpenAlex ID: A5126847282
LevelSyn: Physical-Aware Logic Synthesis via Level-Asynchronous Graph Neural Networks
2026 · Zhou, Jingyi, Shi, Zhengyuan, et al. · arXiv (Cornell University)
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Miter-Aware LUT Mapping: Aligning Structure and Solvability for Efficient Logic Equivalence Checking
2026 · Jiaying Zhu, Zhengyuan Shi, et al. · ACM/IEEE Design Automation Conference (DAC)
Beyond Flat Netlist: Hierarchical Graph Representation Learning for Scalable Analysis of Sequential Circuits
2026 · Jingyi Zhou, Zhengyuan Shi, et al. · ACM/IEEE Design Automation Conference (DAC)
Rethinking Clause Management for CDCL SAT Solvers
2026 · Cai, Yalun, Zhang, Xindi, et al. · arXiv (Cornell University)
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GNN-based Path-aware multi-view Circuit Learning for Technology Mapping
2026 · Jiang, Wentao, Wang, Jingxin, et al. · arXiv (Cornell University)
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Works count: 5
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