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Concept

Logic level

OpenAlex ID: C146569638
Modeling the effect of technology trends on the soft error rate of combinational logic
2003 · P. Shivakumar, M. Kistler, et al. · International Conference on Dependable Systems & Networks/Proceedings · 1,464
Low-power logic styles: CMOS versus pass-transistor logic
1997 · R. Zimmermann, W. Fichtner · IEEE Journal of Solid-State Circuits · 941
A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards
2002 · Kris Tiri, Muhammad Akmal, et al. · European Solid-State Circuits Conference (ESSCIRC) · 531
Dual-threshold voltage techniques for low-power digital circuits
2000 · J.T. Kao, A.P. Chandrakasan · IEEE Journal of Solid-State Circuits · 438
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
2005 · Thomas Popp, Stefan Mangard · Lecture notes in computer science · 407
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Static Noise Margin Variation for Sub-threshold SRAM in 65-nm CMOS
2006 · B.H. Calhoun, A.P. Chandrakasan · IEEE Journal of Solid-State Circuits · 351
A 65 nm Sub-$V_{t}$ Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter
2009 · Joyce Kwong, Yogesh K. Ramadass, et al. · IEEE Journal of Solid-State Circuits · 309
Robust subthreshold logic for ultra-low power operation
2001 · H. Soeleman, K. Roy, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 286
Automated low-power technique exploiting multiple supply voltages applied to a media processor
1998 · K. Usami, M. Igarashi, et al. · IEEE Journal of Solid-State Circuits · 272
Adiabatic dynamic logic
1995 · A.G. Dickinson, J.S. Denker · IEEE Journal of Solid-State Circuits · 259
CMOS Logic Circuit Design
2001 · John P. Uyemura · Springer eBooks · 252
Bridging and Stuck-At Faults
1974 · K.C.Y. Mei · IEEE Transactions on Computers · 235
Integrated injection logic: a new approach to LSI
1972 · K. Hart, A. Slob · IEEE Journal of Solid-State Circuits · 211
A Subthreshold to Above-Threshold Level Shifter Comprising a Wilson Current Mirror
2010 · Sven Lutkemeier, Ulrich Ruckert · IEEE Transactions on Circuits & Systems II Express Briefs · 192
Very-low-voltage testing for weak CMOS logic ICs
2002 · H. Hao, E.J. McCluskey · IEEE International Test Conference (ITC) · 177
Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 $\mu$m HV-CMOS Technology
2010 · Yashodhan Moghe, Torsten Lehmann, et al. · IEEE Journal of Solid-State Circuits · 176
Dynamic current mode logic (DyCML): a new low-power high-performance logic style
2001 · M.W. Allam, M.I. Elmasry · IEEE Journal of Solid-State Circuits · 165
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
2006 · Daisuke Suzuki, Minoru Saeki · Lecture notes in computer science · 161
Implementation of energy efficient single flux quantum digital circuits with sub-aJ/bit operation
2012 · M H Volkmann, A Sahu, et al. · Superconductor Science and Technology · 158
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MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments
2000 · J.M. Musicer, J. Rabaey · International Symposium on Low Power Electronics and Design (ISLPED) · 155
A comparison of CMOS circuit techniques: differential cascode voltage switch logic versus conventional logic
1987 · K.M. Chu, D.L. Pulfrey · IEEE Journal of Solid-State Circuits · 155
Pushing ASIC performance in a power envelope
2003 · Ruchir Puri, Leon Stok, et al. · ACM/IEEE Design Automation Conference (DAC) · 138
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
2006 · Zhimin Chen, Yujie Zhou · Lecture notes in computer science · 132
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QSERL: quasi-static energy recovery logic
2001 · Yibin Ye, K. Roy · IEEE Journal of Solid-State Circuits · 128
Scouting Logic: A Novel Memristor-Based Logic Design for Resistive Computing
2017 · Lei Xie, H.A. Du Nguyen, et al. · IEEE Computer Society Annual Symposium on VLSI · 127
Works count: 3,196
Citation count: 28,230
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