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Semiconductor Technology Academic Research Center (Japan)

Homepage: starc.jp
Alternate names: Semiconductor Technology Academic Research Center, 株式会社半導体理工学研究センター
ROR: 012dbhs94
OpenAlex ID: I4405274098
0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS
2010 · Yasuyuki Okuma, Koichi Ishida, et al. · Custom Integrated Circuits Conference · 173
Challenge: variability characterization and modeling for 65- to 90-nm processes
2006 · H. Masuda, S.-i. Ohkawa, et al. · Custom Integrated Circuits Conference · 144
Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects
2006 · Xijiang Lin, Kun-han Tsai, et al. · Proceedings - Asian Test Symposium/Proceedings · 139
Startup Techniques for 95 mV Step-Up Converter by Capacitor Pass-On Scheme and ${\rm V}_{\rm TH}$-Tuned Oscillator With Fixed Charge Programming
2012 · Po-Hung Chen, Koichi Ishida, et al. · IEEE Journal of Solid-State Circuits · 138
Invisible delay quality - SDQM model lights up what could not be seen
2006 · Y. Sato, S. Hamada, et al. · IEEE International Test Conference (ITC) · 119
Analysis and Characterization of Device Variations in an LSI Chip Using an Integrated Device Matrix Array
2004 · S. Ohkawa, M. Aoki, et al. · IEEE Transactions on Semiconductor Manufacturing · 105
On discrete random dopant modeling in drift-diffusion simulations: physical meaning of `atomistic' dopants
2002 · Nobuyuki Sano, Kazuya Matsuzawa, et al. · Microelectronics Reliability · 104
HiSIM2: Advanced MOSFET Model Valid for RF Circuit Simulation
2006 · M. Miura-Mattausch, N. Sadachika, et al. · IEEE Transactions on Electron Devices · 102
98 mW 10 Gbps Wireless Transceiver Chipset With D-Band CMOS Circuits
2013 · Minoru Fujishima, Mizuki Motoyoshi, et al. · IEEE Journal of Solid-State Circuits · 90
Highly reliable copper dual-damascene interconnects with self-formed MnSi/sub x/O/sub y/ barrier Layer
2006 · T. Usui, H. Nasu, et al. · IEEE Transactions on Electron Devices · 83
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In situ transmission electron microscopy analysis of conductive filament during solid electrolyte resistance switching
2011 · Takashi Fujii, Masashi Arita, et al. · Applied Physics Letters · 82
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0.18-V input charge pump with forward body biasing in startup circuit using 65nm CMOS
2010 · Po-Hung Chen, Koichi Ishida, et al. · Custom Integrated Circuits Conference · 81
Chemistry and band offsets of HfO2 thin films for gate insulators
2003 · M. Oshima, S. Toyoda, et al. · Applied Physics Letters · 72
A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS
2014 · Xin Zhang, Po-Hung Chen, et al. · IEEE Journal of Solid-State Circuits · 71
An 80 mV Startup Dual-Mode Boost Converter by Charge-Pumped Pulse Generator and Threshold Voltage Tuned Oscillator With Hot Carrier Injection
2012 · Po-Hung Chen, Xin Zhang, et al. · IEEE Journal of Solid-State Circuits · 66
Role of long-range and short-range Coulomb potentials in threshold characteristics under discrete dopants in sub-0.1 μm Si-MOSFETs
2002 · N. Sano, K. Matsuzawa, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 65
A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme
2011 · Po-Hung Chen, Koichi Ishida, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 62
A 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester
2012 · Po-Hung Chen, Koichi Ishida, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 60
Evaluation of the statistical delay quality model
2005 · Y. Sato, S. Hamada, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 57
Chemistry and band offsets of HfO2 thin films on Si revealed by photoelectron spectroscopy and x-ray absorption spectroscopy
2004 · S Toyoda, J Okabayashi, et al. · Journal of Electron Spectroscopy and Related Phenomena · 52
An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs
2005 · T. Tsukada, Y. Hashimoto, et al. · IEEE Journal of Solid-State Circuits · 51
SAR ADC Algorithm with Redundancy and Digital Error Correction
2010 · Tomohiko OGAWA, Haruo KOBAYASHI, et al. · IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences · 50
Universal NBTI Compact Model for Circuit Aging Simulation under Any Stress Conditions
2014 · Chenyue Ma, Hans Jurgen Mattausch, et al. · IEEE Transactions on Device and Materials Reliability · 49
13% Power reduction in 16b integer unit in 40nm CMOS by adaptive power supply voltage control with parity-based error prediction and detection (PEPD) and fully integrated digital LDO
2012 · Koji Hirairi, Yasuyuki Okuma, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 47
Effects of interlayer and annealing on chemical states of HfO2 gate insulators studied by photoemission spectroscopy
2004 · S. Toyoda, J. Okabayashi, et al. · Applied Physics Letters · 46
Works count: 356
Citation count: 15,030
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