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Toshiba Electronic Device Solutions (Japan)

Homepage: toshiba.co.jp
Alternate names: Toshiba Microelectronics Corporation, 東芝デバイスソリューション, 東芝マイクロエレクトロニクス
ROR: 0230pyr39
OpenAlex ID: I4405283676
A CMOS bandgap reference circuit with sub-1-V operation
1999 · H. Banba, H. Shiga, et al. · IEEE Journal of Solid-State Circuits · 918
A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture
1993 · T. Kobayashi, K. Nogami, et al. · IEEE Journal of Solid-State Circuits · 352
Variable supply-voltage scheme for low-power high-speed CMOS digital design
1998 · T. Kuroda, K. Suzuki, et al. · IEEE Journal of Solid-State Circuits · 266
A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure
1992 · A. Umezawa, S. Atsumi, et al. · IEEE Journal of Solid-State Circuits · 148
A 200 MHz 13 mm/sup 2/ 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme
1994 · M. Matsui, H. Hara, et al. · IEEE Journal of Solid-State Circuits · 145
A current-mode latch sense amplifier and a static power saving input buffer for low-power architecture
2003 · T. Kobayashi, K. Nogami, et al. · Symposium on VLSI Circuits · 141
A Fully Static Topologically-Compressed 21-Transistor Flip-Flop With 75% Power Saving
2014 · Natsumi Kawai, Shinichi Takayama, et al. · IEEE Journal of Solid-State Circuits · 119
A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme
1998 · M. Takahashi, M. Hamada, et al. · IEEE Journal of Solid-State Circuits · 111
Planar inductor with ferrite layers for DC-DC converter
2003 · Y. Fukuda, T. Inoue, et al. · IEEE Transactions on Magnetics · 101
A top-down low power design technique using clustered voltage scaling with variable supply-voltage scheme
2002 · M. Hamada, M. Takahashi, et al. · Custom Integrated Circuits Conference · 99
Memory design using a one-transistor gain cell on SOI
2002 · T. Ohsawa, K. Fujita, et al. · IEEE Journal of Solid-State Circuits · 97
A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mb embedded DRAM
2000 · M. Takahashi, T. Nishikawa, et al. · IEEE Journal of Solid-State Circuits · 90
A 70 nm 16 Gb 16-Level-Cell NAND flash Memory
2008 · N. Shibata, H. Maejima, et al. · IEEE Journal of Solid-State Circuits · 81
Introducing redundancy in field programmable gate arrays
2002 · F. Hatori, T. Sakurai, et al. · Custom Integrated Circuits Conference · 78
A CMOS band-gap reference circuit with sub 1 V operation
2002 · H. Banba, H. Shiga, et al. · Symposium on VLSI Circuits · 78
Degradation mechanism of flash EEPROM programming after program/erase cycles
2002 · S. Yamada, Y. Hiura, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 71
Automated selective multi-threshold design for ultra-low standby applications
2002 · Kimiyoshi Usami, Naoyuki Kawabe, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 66
Analysis of hot-carrier-induced degradation mode on pMOSFET's
1990 · F. Matsuoka, H. Iwai, et al. · IEEE Transactions on Electron Devices · 66
An LDPC Decoder With Time-Domain Analog and Digital Mixed-Signal Processing
2013 · Daisuke Miyashita, Ryo Yamaki, et al. · IEEE Journal of Solid-State Circuits · 61
A one-chip scalable 8*8 ATM switch LSI employing shared buffer architecture
1991 · Y. Shobatake, M. Motoyama, et al. · IEEE Journal on Selected Areas in Communications · 61
ONO inter-poly dielectric scaling for nonvolatile memory applications
1991 · S. Mori, E. Sakagami, et al. · IEEE Transactions on Electron Devices · 59
A self-convergence erasing scheme for a simple stacked gate flash EEPROM
2002 · S. Yamada, T. Suzuki, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 54
Stress-induced voiding phenomena for an actual CMOS LSI interconnects
2003 · K. Yoshida, T. Fujimaki, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 47
A 300 MIPS/W RISC core processor with variable supply-voltage scheme in variable threshold-voltage CMOS
2002 · K. Suzuki, S. Mita, et al. · Custom Integrated Circuits Conference · 47
A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
2002 · T. Nishikawa, M. Takahashi, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 44
Works count: 259
Citation count: 10,750
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