Source

Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium

ISSNs: 1093-0167, 2375-1053

Source type: conference

Alternate names: Very Large Scale Integration Test Symposium, VTS, Proceedings ... IEEE ... VLSI Test Symposium, VLSI Test Symposium, IEEE Very Large Scale Integration Test Symposium, IEEE VLSI Test Symposium, IEEE ... VLSI Test Symposium, Digest of Papers. 1992 IEEE VLSI Test Symposium, Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, IEEE VLSI Test Symposium (VTS)

Fully OA: No

DOAJ: No

OpenAlex ID: S4210180668

A distributed BIST control scheme for complex VLSI devices

2002 · Y. Zorian · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 538

Time redundancy based soft-error tolerance to rescue nanometer technologies

2003 · M. Nicolaidis · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 500

Circuit Failure Prediction and Its Application to Transistor Aging

2007 · Mridul Agarwal, Bipul C. Paul, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 456

Static compaction techniques to control scan vector power dissipation

2002 · R. Sankaralingam, R.R. Oruganti, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 354

Scan vector compression/decompression using statistical coding

2003 · A. Jas, J. Ghosh-Dastidar, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 264

Functional memory faults: a formal notation and a taxonomy

2002 · Ad.J. van de Goor, Z. Al-Ars · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 206

Carafe: an inductive fault analysis tool for CMOS VLSI circuits

2002 · A. Jee, F.J. Ferguson · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 180

Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code

2007 · Avijit Dutta, Nur A. Touba · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 179

Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator

2018 · Jeff Jun Zhang, Tianyu Gu, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 176

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On using rectangle packing for SOC wrapper/TAM co-optimization

2003 · V. Iyengar, K. Chakrabarty, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 176

On low-capture-power test generation for scan testing

2005 · Xiaoqing Wen, Y. Yamashita, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 164

A test vector inhibiting technique for low energy BIST design

2003 · P. Girard, L. Guiller, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 157

A structured and scalable test access architecture for TSV-based 3D stacked ICs

2010 · Erik Jan Marinissen, Jouke Verbree, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 147

An experimental study comparing the relative effectiveness of functional, scan, IDDq and delay-fault testing

2002 · P. Nigh, W. Needham, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 141

Test data compression for system-on-a-chip using Golomb codes

2002 · A. Chandra, K. Chakrabarty · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 133

Testing static and dynamic faults in random access memories

2003 · S. Hamdioui, Z. Al-Ars, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 131

Instruction randomization self test for processor cores

2003 · K. Batcher, C. Papachristou · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 130

On-chip testing of blind and open-sleeve TSVs for 3D IC before bonding

2010 · Po-Yuan Chen, Cheng-Wen Wu, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 129

Defects and faults in quantum cellular automata at nano scale

2004 · M.B. Tahoori, M. Momenzadeh, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 129

Application of Saluja-Karpovsky compactors to test responses with many unknowns

2003 · J.H. Patel, S.S. Lumetta, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 119

Analysis of ground bounce in deep sub-micron circuits

2002 · Yi-Shing Chang, S.K. Gupta, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 117

REDO-random excitation and deterministic observation-first commercial experiment

2003 · M.R. Grimaila, Sooryong Lee, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 116

Test of RAM-based FPGA: methodology and application to the interconnect

2002 · M. Renovell, J. Figueras, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 114

A Low-Cost Solution for Protecting IPs Against Scan-Based Side-Channel Attacks

2006 · J. Lee, M. Tehranipoor, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 113

Controlling peak power during scan testing

2003 · R. Sankaralingam, N.A. Touba · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 111

Works count: 2,234

Citation count: 28,140

H-index: 69

I10-index: 711

2yr mean citedness: 1.565