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IEEE International D Systems Integration Conference
Source type:
conference
Fully OA:
No
DOAJ:
No
OpenAlex ID:
S4306418735
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing
2013
·
Qiuling Zhu
, Berkin Akin
, et al.
·
IEEE International D Systems Integration Conference
·
121
PDF
3D DfT architecture for pre-bond and post-bond testing
2010
·
Erik Jan Marinissen
, Chun-Chuan Chi
, et al.
·
IEEE International D Systems Integration Conference
·
66
The development and evaluation of RF TSV for 3D IPD applications
2013
·
Thorbjorn Ebefors
, Jessica Fredlund
, et al.
·
IEEE International D Systems Integration Conference
·
56
Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network
2010
·
Zheng Xu
, Adam Beece
, et al.
·
IEEE International D Systems Integration Conference
·
42
A study of IR-drop noise issues in 3D ICs with through-silicon-vias
2010
·
Moongon Jung
, Sung Kyu Lim
·
IEEE International D Systems Integration Conference
·
38
Wireless power transfer using resonant inductive coupling for 3D integrated ICs
2010
·
Sangwook Han
, David D. Wentzloff
·
IEEE International D Systems Integration Conference
·
35
Recent developments of Cu-Cu non-thermo compression bonding for wafer-to-wafer 3D stacking
2010
·
I. Radu
, D. Landru
, et al.
·
IEEE International D Systems Integration Conference
·
32
Wafer-level hybrid bonding technology with copper/polymer co-planarization
2010
·
Mayu Aoki
, Kazuyuki Hozawa
, et al.
·
IEEE International D Systems Integration Conference
·
29
Performance and process characteristic of glass interposer with through-glass-via(TGV)
2013
·
Chun-Hsien Chien
, Hsun Yu
, et al.
·
IEEE International D Systems Integration Conference
·
27
A 3D SoC design for H.264 application with on-chip DRAM stacking
2010
·
Tao Zhang
, Kui Wang
, et al.
·
IEEE International D Systems Integration Conference
·
27
Cost effectiveness of 3D integration options
2010
·
Dimitrios Velenis
, Erik Jan Marinissen
, et al.
·
IEEE International D Systems Integration Conference
·
27
Within-tier cooling and thermal isolation technologies for heterogeneous 3D ICs
2013
·
Yue Zhang
, Hanju Oh
, et al.
·
IEEE International D Systems Integration Conference
·
26
Integration of intra chip stack fluidic cooling using thin-layer solder bonding
2013
·
Yassir Madhour
, Michael Zervas
, et al.
·
IEEE International D Systems Integration Conference
·
25
Monolithic 3D integration of SRAM and image sensor using two layers of single grain silicon
2010
·
Negin Golshani
, Jaber Derakhshandeh
, et al.
·
IEEE International D Systems Integration Conference
·
22
A compact 3D silicon interposer package with integrated antenna for 60GHz wireless applications
2013
·
Y. Lamy
, L. Dussopt
, et al.
·
IEEE International D Systems Integration Conference
·
21
Timing analysis and optimization for 3D stacked multi-core microprocessors
2010
·
Young-Joon Lee
, Sung Kyu Lim
·
IEEE International D Systems Integration Conference
·
21
Fabrication of TSV-based silicon interposers
2010
·
D. Malta
, E. Vick
, et al.
·
IEEE International D Systems Integration Conference
·
21
Wafer-level 3D integration using hybrid bonding
2010
·
Cheng-Ta Ko
, Kuan-Neng Chen
, et al.
·
IEEE International D Systems Integration Conference
·
20
Extreme wafer thinning optimization for via-last applications
2016
·
Anne Jourdain
, Joeri De Vos
, et al.
·
IEEE International D Systems Integration Conference
·
19
300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications
2010
·
Anne Jourdain
, Thibault Buisson
, et al.
·
IEEE International D Systems Integration Conference
·
19
Logic-on-logic 3D integration and placement
2010
·
Thorlindur Thorolfsson
, Guojie Luo
, et al.
·
IEEE International D Systems Integration Conference
·
19
3D stacked buck converter with 15μm thick spiral inductor on silicon interposer for fine-grain power-supply voltage control in SiP's
2010
·
Koichi Ishida
, Koichi Takemura
, et al.
·
IEEE International D Systems Integration Conference
·
18
Developing digital test sequences for through-silicon vias within 3D structures
2010
·
Matthias Gulbins
, Fabian Hopsch
, et al.
·
IEEE International D Systems Integration Conference
·
18
Recent progress in thin wafer processing
2013
·
Thomas Uhrmann
, Thorsten Matthias
, et al.
·
IEEE International D Systems Integration Conference
·
17
Using 3D-COSTAR for 2.5D test cost optimization
2013
·
Mottaqiallah Taouil
, Said Hamdioui
, et al.
·
IEEE International D Systems Integration Conference
·
17
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Works count:
248
Citation count:
1,829
H-index:
19
I10-index:
56
2yr mean citedness:
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