Source

ERSA

Source type: journal

Publisher:

Fully OA: No

DOAJ: No

OpenAlex ID: S4306509693

A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing.

2005 · Ronald Scrofano, Gokul Govindu, et al. · ERSA · 79

Efficient Floating-point Based Block LU Decomposition on FPGAs.

2004 · Gokul Govindu, Viktor K. Prasanna, et al. · ERSA · 37

Design Productivity for Configurable Computing.

2008 · Brent Nelson, Michael Wirthlin, et al. · ERSA · 26

An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx SRAM FPGAs.

2008 · Heather Quinn, Paul Graham, et al. · ERSA · 25

TMR with More Frequent Voting for Improved FPGA Reliability.

2008 · Brian Pratt, Michael Caffrey, et al. · ERSA · 17

Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators.

2009 · Hassan Edrees, Brian Cheung, et al. · ERSA · 16

The Case for High Level Programming Models for Reconfigurable Computers.

2006 · David Andrews, Ron Sass, et al. · ERSA · 14

Searching RC5-Keys with Distributed Reconfigurable Computing.

2006 · Dirk Koch, Matthiaas Koerber, et al. · ERSA · 14

DAPR: Design Automation for Partially Reconfigurable FPGAs.

2010 · Shaon Yousuf, Ross Gordon · ERSA · 13

Acceleration of FPGA Fault Injection Through Multi-Bit Testing.

2010 · Grzegorz Cieslewski, Alan George, et al. · ERSA · 13

A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array.

2009 · Yoshiki Saito, Toru Sano, et al. · ERSA · 13

Fast Real-Time LIDAR Processing on FPGAs.

2008 · Kuei-Tsung Shih, Arjun Balachandran, et al. · ERSA · 12

Partial-DNA Supported Artificial-Life in an Embryonic Array.

2004 · Xuegang Zhang, Gabriel Dragffy, et al. · ERSA · 12

A Dynamic Reconfigurable MRAM based FPGA.

2010 · Lionel Torres, Yoann Guillemenet, et al. · ERSA · 11

H-Tree Interconnection Structure for Reconfigurable DSP Hardware.

2004 · Mitchell J. Myjak, Fredrick L. Anderson, et al. · ERSA · 11

Novo-G: A View at the HPC Crossroads for Scientific Computing.

2010 · Alan George, Herman Lam, et al. · ERSA · 10

An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters.

2009 · Shota Ishihara, Komatsu Yoshiya, et al. · ERSA · 10

Reducing the reconfiguration overhead: a survey of techniques.

2007 · Elena Pérez Ramo, Javier Resano, et al. · ERSA · 8

The Task-Resource Matrix: Control for a Distributed Reconfigurable Multi-Processor Hardware RTOS.

2004 · Spencer W. Isaacson, Doran Wilde · ERSA · 8

FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images.

2010 · Carlos González, Daniel Mozos, et al. · ERSA · 7

Compile- and Run-Time Services for Distributed Hetergeneous Reconfigurable Computing.

2006 · Brian Holland, J. Greco, et al. · ERSA · 7

Logic Synthesis and Place-and-Route Environment for ORGAs.

2006 · Minoru Watanabe, Fuminori Kobayashi · ERSA · 7

Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays.

2009 · Hasitha Muthumala Waidyasooriya, Masanori Hariyama, et al. · ERSA · 6

Supporting Operating Systems for Reconfigurable Computing: A Distributed Service Oriented Approach.

2009 · Fernando Rincón, Julio Dondo, et al. · ERSA · 6

Coarse-Grained Reconfigurable Computing for Power Aware Applications.

2006 · P.M. Heysters · ERSA · 6

Works count: 191

Citation count: 517

H-index: 12

I10-index: 17

2yr mean citedness: