Work

Leakage Power Analysis of Multi-bit Adders Using Transistor Gate Length Increase.

Year: 2010

Type: article

Source: CDES

Authors: Savithra Eratne, Claudia Romo, Eugene John

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W129776183

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Related to: 10