A CMOS RISC CPU with on-chip parallel cache
Year: 2002
Type: conference-paper
Authors: E. Rashid, E. Delano, K. Chan, M. Buckley, J. Zheng, F. Schumacher, G. Kurpanek, J. Shelton, T. Alexander, N. Noordeen, M. Ludwig, A. Scherer, C. Amir, D. Cheung, P. Sabada, R. Rajamani, N. Fiduccia, B. Ches, K. Eshghi, F. Eatock, D. Renfrow, J. Keller, P. Ilgenfritz, I. Krashinsky, D. Weatherspoon, S. Ranade, D. Goldberg, W. Bryg
Institution: Hewlett-Packard (United States)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W1584287597
