Year: 2005
Type: dissertation
Abstract: Computer designers rely on simulation systems to assess the performance of their \ndesigns before the design is transferred to silicon and manufactured. Simulators are used \nin early design studies to obtain projections of performance and power over a large space \nof potential designs. Modern simulation systems can be four orders of magnitude slower \nthan native hardware execution. At the same time, the numbers of applications and their \ndynamic instruction counts have expanded dramatically. In addition, simulation systems \nneed to be validated against cycle-accurate models to ensure accurate performance \nprojections. In prior work, long running applications are used for early design studies \nwhile hand-coded microbenchmarks are used for performance model validation. \nOne proposed solution for early design studies is statistical simulation, in which \nstatistics from the workload characterization of an executing application are used to \ncreate a synthetic instruction trace that is executed on a fast performance simulator. In \nprior work, workload statistics are collected as average behaviors based on instruction \ntypes. In the present research, statistics are collected at the granularity of the basic block. \nThis improves the simulation accuracy of individual instructions. \nThe basic block statistics form a statistical flow graph that provides a reduced \nrepresentation of the application. The synthetic trace generated from a traversal of the \nflow graph is combined with memory access models, branching models and novel \nprogram synthesis techniques to automatically create executable code that is useful for \nperformance model validation. Runtimes for the synthetic versions of the SPEC CPU, \nSTREAM, TPC-C and Java applications are orders of magnitude faster than the runtimes \nof the original applications with performance and power dissipation correlating to within \n2.4% and 6.4%, respectively, on average. \nThe synthetic codes are portable to a variety of platforms, permitting validations \nbetween diverse models and hardware. Synthetic workload characteristics can easily be \nmodified to model different or future workloads. The use of statistics abstracts \nproprietary code, encouraging code sharing between industry and academia. The \nsignificantly reduced execution times consolidate the traditionally disparate workloads \nused for early design studies and model validation.
Authors: Lizy K. John, Robert H. Bell
Institution: The University of Texas at Austin
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W1960843492