Work

Realizable parasitic reduction for distributed interconnects using matrix pencil technique

Year: 2004

Type: article

DOI: 10.5555/1015090.1015300

Authors: Janet Wang, Prashant Saxena, O. Hafiz, Xing Wang

Institutions: University of Arizona, Intel (United States)

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2017227712

FWCI:

Cites: 12

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Related to: 10